公开(公告)号：US20240407175A1

公开(公告)日：2024-12-05

申请号：US18326939

申请日：2023-05-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Scott R. SUMMERFELT ,  Michael BALL ,  John RODRIGUEZ ,  Nagesh SURENDRANATH ,  Antoine Lourdes Praveen AROUL ,  Eduardo BARTOLOME

IPC: H10B53/40 ,  G11C11/22 ,  H10B53/30

Abstract: An apparatus includes: groups of ferroelectric memory bit cells; and memory interface circuitry having processing outputs and memory access terminals. The memory access terminals are coupled to the groups of ferroelectric memory bit cells. The memory interface circuitry is configured to: provide control signals via the memory access terminals to perform read operations on the groups of ferroelectric memory bit cells; receive first signals from the groups of ferroelectric memory bit cells via the memory access terminals from the read operations; and for each group of the groups of ferroelectric memory bit cells, provide second signals representing relationships between the first signals received from the group of ferroelectric memory bit cells and a respective reference voltage of the reference voltages at the processing outputs, the reference voltages representing different temperatures.

公开(公告)号：US20250096449A1

公开(公告)日：2025-03-20

申请号：US18966756

申请日：2024-12-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bichoy BAHR ,  Benjamin Stassen COOK ,  Scott R. SUMMERFELT

IPC: H01P3/12 ,  H01L23/31 ,  H01L25/18 ,  H05K1/18

Abstract: In some examples, a package includes a semiconductor die having a first surface and a second surface opposing the first surface, the semiconductor die including circuitry in the first surface. The package also includes an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors and a connector coupling the circuitry to the acoustic waveguide.

公开(公告)号：US20220399628A1

公开(公告)日：2022-12-15

申请号：US17347365

申请日：2021-06-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Bichoy BAHR ,  Benjamin Stassen COOK ,  Scott R. SUMMERFELT

IPC: H01P3/12 ,  H05K1/18 ,  H01L25/18 ,  H01L23/31

Abstract: In some examples, a package comprises a semiconductor die having a first surface and a second surface opposing the first surface, the semiconductor die including circuitry formed in the first surface. The package includes an acoustic waveguide in the semiconductor die, the acoustic waveguide including an array of capacitors. The array of capacitors includes a transducer portion and a diffraction grating portion. The transducer portion is configured to convert signals between electrical signals and acoustic waves, and the diffraction grating portion is configured to direct the acoustic waves toward and receive the acoustic waves from the second surface.

公开(公告)号：US20130302965A1

公开(公告)日：2013-11-14

申请号：US13932275

申请日：2013-07-01

Applicant: Texas Instruments Incorporated

Inventor： Scott R. SUMMERFELT ,  Byron L. WILLIAMS ,  Scott K. MONTGOMERY ,  James KLAWINSKY ,  Asad M. HAIDER

IPC: H01L49/02

CPC classification number: H01L28/40 ,  H01L23/5223 ,  H01L23/5228 ,  H01L27/016 ,  H01L28/20 ,  H01L28/24 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit structure with a metal-to-metal capacitor and a metallic device such as a resistor, effuse, or local interconnect where the bottom plate of the capacitor and the metallic device are formed with the same material layers. A process for forming a metallic device along with a metal-to-metal capacitor with no additional manufacturing steps.

Abstract translation: 具有金属对金属电容器的集成电路结构和电容器，阴极或局部互连的金属器件，其中电容器的底板和金属器件形成有相同的材料层。 用于与金属对金属电容器一起形成金属器件的方法，而不需要额外的制造步骤。