公开(公告)号：US20190146543A1

公开(公告)日：2019-05-16

申请号：US15996917

申请日：2018-06-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shailendra Kumar BARANWAL ,  Anant Shankar KAMATH

IPC: G05F3/26 ,  H03K19/003 ,  H03F3/16 ,  H03K19/0185

Abstract: A bandgap voltage reference is provided in quasi-parallel with a resistor in the input path of a digital input circuit. Because of the quasi-parallel nature, the current used by the digital input circuit is limited to an amount based on the value of the external resistor. The input current is split between circuitry used to provide the logic signal across the selected isolation barrier and a sink transistor so that the current remains constant. This allows the digital input circuit to accurately limit input current without needing field-side power.

公开(公告)号：US20220263478A1

公开(公告)日：2022-08-18

申请号：US17175789

申请日：2021-02-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Junmin JIANG ,  Yinglai XIA ,  Yogesh Kumar RAMADASS ,  Shailendra Kumar BARANWAL

IPC: H03F3/217 ,  H03G3/30

Abstract: A system includes a charge pump having an input coupled to a first voltage and an output at a second voltage, the second voltage greater than the first voltage. The system also includes an amplifier having a first input, a second input, and a third input, the first input coupled to the output of the charge pump, the second input coupled to the first voltage, the third input coupled to an input signal, the amplifier having an amplified output signal. The system also includes a maximum power detector coupled to the amplifier, the maximum power detector operable to determine whether the amplified output signal has reached a threshold output level and to reduce a power of the amplified output signal responsive to the determination.

公开(公告)号：US20210184663A1

公开(公告)日：2021-06-17

申请号：US17119604

申请日：2020-12-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yinglai XIA ,  Shailendra Kumar BARANWAL ,  Yogesh Kumar RAMADASS ,  Junmin JIANG

IPC: H03K4/08 ,  H03L7/089 ,  H03L7/099 ,  H03L7/081 ,  H03F3/217

Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.

公开(公告)号：US20200304080A1

公开(公告)日：2020-09-24

申请号：US16360703

申请日：2019-03-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yinglai XIA ,  Shailendra Kumar BARANWAL ,  Junmin JIANG ,  Yogesh Kumar RAMADASS

IPC: H03F3/217 ,  H02M3/07

Abstract: An amplifier comprises eight transistors: the first coupled to a linked node and to a positive output node, the second coupled to the linked node and to a negative output node, the third coupled to the positive output node and a common potential, the fourth coupled to the negative output node and the common potential, the fifth coupled to a battery node, the sixth coupled to the fifth transistor and to the positive output node, the seventh coupled to the battery node, and the eighth coupled to the seventh transistor and to the negative output node. The amplifier also includes a charge pump to convert the battery voltage to an increased voltage on the linked node. The charge pump includes capacitors and operates at a lower frequency in lower power mode and a higher frequency in higher power mode to increase power provided to the linked node.

公开(公告)号：US20200304111A1

公开(公告)日：2020-09-24

申请号：US16360927

申请日：2019-03-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yogesh Kumar RAMADASS ,  Bhushan TALELE ,  Shailendra Kumar BARANWAL ,  Yinglai XIA ,  Junmin JIANG

IPC: H03K4/08 ,  H03F3/217 ,  H02M3/07 ,  H03L7/099 ,  H03L7/081 ,  H03L7/093

Abstract: A multi-level ramp generator comprises three ramp generators. The first ramp generator generates a first ramp signal, comprising a sawtooth voltage waveform with a first common mode voltage and a first peak to peak voltage. The second ramp generator generates a second ramp signal, comprising a sawtooth voltage waveform with a second common mode voltage and a second peak-to-peak voltage. The third ramp generator generates a third ramp signal, comprising a sawtooth voltage waveform with a third common mode voltage and the second peak-to-peak voltage. The second and third ramp signals are in phase with each other and the first ramp signal is 180° out of phase with the second and third ramp signals. In some implementations, each of the first, second, and third ramp generators comprise a respective delay locked loop and a respective voltage controlled oscillator.

公开(公告)号：US20200212809A1

公开(公告)日：2020-07-02

申请号：US16233168

申请日：2018-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shailendra Kumar BARANWAL ,  Jeffrey MORRONI

IPC: H02M3/335

Abstract: A power converter includes a first switch with a first transistor having a first blocking voltage in parallel with a second transistor having a second blocking voltage that is higher than the first blocking voltage. The power converter also includes a second switch. The power converter also includes a controller coupled to the first and second switches and configured to provide switch control signals. The power converter also includes a sequencer coupled to the first and second transistors and configured to generate offset transition signals for the first and second transistors based on a switch control signal provided by the controller.

公开(公告)号：US20190097517A1

公开(公告)日：2019-03-28

申请号：US15713204

申请日：2017-09-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shailendra Kumar BARANWAL ,  William Todd HARRISON ,  Yogesh Kumar RAMADASS

IPC: H02M1/08 ,  H02M3/156

CPC classification number: H02M1/08 ,  H02M1/44 ,  H02M3/156 ,  H02M2001/0048 ,  H03K17/166 ,  H03K2217/0081

Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.