Abstract:
A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
Abstract:
Generally speaking, a timing circuit helps determine diode conduction time of an LLC converter. In some examples, the circuit includes an LLC converter having a secondary side and a timing circuit, the timing circuit coupled to the LLC converter on the secondary side. The timing circuit includes a first branch, second branch, gate, and microprocessor. The gate is configured to receive an output of the first branch's comparator and a blanking signal from the second branch. The microprocessor is configured to receive, from the gate, a signal and determine, based at least in part on the signal, a diode conduction time for the LLC converter.
Abstract:
An example apparatus includes: a first and second capacitor; a first and second inductor; a first switch having a first and second terminal, the first terminal coupled to the first capacitor, and the second terminal coupled to the first and second inductor; a second switch having a third and fourth terminal, the third terminal coupled to the second terminal, the fourth terminal coupled to the second capacitor; a third switch having a fifth and sixth terminal, the fifth terminal coupled to the first terminal, the sixth terminal coupled to the second inductor; and a diode having a seventh and eighth terminal, the seventh terminal coupled to the sixth terminal, the eighth terminal coupled to the fourth terminal.
Abstract:
A digital power supply and power supply controller are presented, including a voltage control loop and a current control loop, with a controller for pulse width modulating a switching power supply according to a voltage control loop duty cycle output or a current control loop duty cycle output, in which the controller selectively presets the voltage control loop duty cycle output to a predetermined value before switching from current loop control to voltage loop control and/or inhibits increase in a voltage loop integrator value during current loop control to mitigate voltage overshoot.
Abstract:
Generally speaking, a timing circuit helps determine diode conduction time of an LLC converter. In some examples, the circuit includes an LLC converter having a secondary side and a timing circuit, the timing circuit coupled to the LLC converter on the secondary side. The timing circuit includes a first branch, second branch, gate, and microprocessor. The gate is configured to receive an output of the first branch's comparator and a blanking signal from the second branch. The microprocessor is configured to receive, from the gate, a signal and determine, based at least in part on the signal, a diode conduction time for the LLC converter.
Abstract:
In at least one example, an apparatus includes a current sense circuit, an imbalance detector, and a current balancer. The current sense circuit including a first phase input, a second phase input, a first sense output, and a second sense output. The imbalance detector having a detector output, a first detector input, and second detector input. The first detector input is coupled to the first sense output and the second detector input is coupled to the second sense output. The current balancer having a balancer input and a balancer output. The balancer input is coupled to the detector output.
Abstract:
An example apparatus includes: a first and second capacitor; a first and second inductor; a first switch having a first and second terminal, the first terminal coupled to the first capacitor, and the second terminal coupled to the first and second inductor; a second switch having a third and fourth terminal, the third terminal coupled to the second terminal, the fourth terminal coupled to the second capacitor; a third switch having a fifth and sixth terminal, the fifth terminal coupled to the first terminal, the sixth terminal coupled to the second inductor; and a diode having a seventh and eighth terminal, the seventh terminal coupled to the sixth terminal, the eighth terminal coupled to the fourth terminal.
Abstract:
A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
Abstract:
A switching converter is provided that includes a power MOSFET, a controller having a drive pin connected to a gate terminal of the power MOSFET, and a resistor connected to the gate terminal. A compensation time selection circuit is included that has compensation times stored therein. A compensation time is selected from the compensation times based on a value of the resistor and stored in the controller. The selected compensation time compensates for an inherent delay in switching the power MOSFET to an ON state after the power MOSFET receives a signal to switch to the ON state to allow the power MOSFET to switch to the ON state when a drain voltage of the power MOSFET's reaches its lowest value during a switching cycle.
Abstract:
A digital power supply and power supply controller are presented, including a voltage control loop and a current control loop, with a controller for pulse width modulating a switching power supply according to a voltage control loop duty cycle output or a current control loop duty cycle output, in which the controller selectively presets the voltage control loop duty cycle output to a predetermined value before switching from current loop control to voltage loop control and/or inhibits increase in a voltage loop integrator value during current loop control to mitigate voltage overshoot.