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公开(公告)号:US20170295533A1
公开(公告)日:2017-10-12
申请号:US15632858
申请日:2017-06-26
Applicant: Texas Instruments Incorporated
Inventor: Nirmal Chindhu WARKE , Srinath HOSUR , Martin J. IZZARD , Siraj AKHTAR , Baher S. HAROUN , Marco CORSI
IPC: H04W40/06 , H01Q9/20 , H01Q21/00 , H04B7/06 , H04B17/336 , H04L12/741 , H01Q3/26
CPC classification number: H04W40/00 , H01Q3/26 , H01Q9/20 , H01Q21/0006 , H01Q21/0037 , H04B7/0617 , H04B17/336 , H04L45/74 , H04L49/3009 , H04L49/40 , H04W40/06 , H04W40/12 , Y02D70/00 , Y02D70/166 , Y02D70/322 , Y02D70/34
Abstract: Embodiments of the invention provide a system and method for chip to chip communications in electronic circuits. In one embodiment, a networking device includes an input port circuit having a transmitter circuit coupled one or more transmitter antennas, wherein the input port circuit transmits a data packet to a first output port circuit using millimeter wave signals. The networking device includes output port circuits including at least the first output port circuit, each of the output port circuits having a receiver circuit coupled to one or more receiver antennas. The networking device includes a beamforming circuit coupled to the one or more transmitter antennas of the input port circuit, wherein the beamforming circuit causes the one or more transmitter antennas to transmit an antenna beam directed at the one or more receiver antennas of the first output port circuit.
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公开(公告)号:US20240071959A1
公开(公告)日:2024-02-29
申请号:US18345296
申请日:2023-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Harshpreet Singh Phull BAKSHI , Sylvester ANKAMAH-KUSI , Siraj AKHTAR , Rajen Manicon MURUGAN
IPC: H01L23/64 , H01L21/02 , H01L21/288 , H01L21/3205 , H01L21/56 , H01L21/768 , H01L23/31 , H01L23/498 , H01L25/16
CPC classification number: H01L23/645 , H01L21/022 , H01L21/288 , H01L21/3205 , H01L21/565 , H01L21/76877 , H01L23/3107 , H01L23/49816 , H01L23/49822 , H01L23/49838 , H01L25/16
Abstract: In examples, a semiconductor package comprises a conductive terminal; a semiconductor die including a device side having circuitry formed therein, the device side facing toward the conductive terminal; and a substrate coupled to the conductive terminal and to the device side of the semiconductor die. The substrate includes a first metal layer coupled to first and second vias extending toward and coupled to either the device side of the semiconductor die or the conductive terminal. The substrate includes a second metal layer electrically isolated from the first metal layer by an insulation layer between the first and second metal layers, the second metal layer coupled to a third via extending toward and coupled to either the conductive terminal or the semiconductor die. The first and second metal layers form a Marchand balun.
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