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公开(公告)号：US20230208277A1
公开(公告)日：2023-06-29
申请号：US18171752
申请日：2023-02-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Subhash Sahni
CPC classification number: H02M1/083 , H02M3/158 , H02M1/0009
Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
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公开(公告)号：US11683066B2
公开(公告)日：2023-06-20
申请号：US17348817
申请日：2021-06-16
Applicant: Texas Instruments Incorporated
Inventor： Debapriya Sahu , Rohit Chatterjee , Srinivas Venkata Veeramreddi
CPC classification number: H04B1/44 , H04L27/367
Abstract: A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
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公开(公告)号：US20160190923A1
公开(公告)日：2016-06-30
申请号：US14588111
申请日：2014-12-31
Applicant: Texas Instruments Incorporated
Inventor： Srinivas Venkata Veeramreddi
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M2001/0032 , H02M2001/008 , Y02B70/16
Abstract: A power conversion system includes, for example, a PFM controller, a PWM controller, and an auxiliary voltage output stage. The PFM controller controls a power output stage in a PFM mode in response to a power stage voltage output generated by the power output stage during a first period of time in which the power output stage is operating in the PFM mode. The PWM controller controls the power output stage in a PWM mode in response to a power stage voltage output generated by the power output stage during a second period of time in which the power output stage is operating in the PWM mode. The auxiliary voltage output stage generates an auxiliary voltage during a third period of time , where the PWM controller controls the auxiliary power output stage using the auxiliary voltage during the third period of time.
Abstract translation: 电力转换系统包括例如PFM控制器，PWM控制器和辅助电压输出级。 PFM控制器响应于在功率输出级在PFM模式下操作的第一时间段期间由功率输出级产生的功率级电压输出，在PFM模式中控制功率输出级。 PWM控制器响应于在功率输出级在PWM模式下工作的第二时段期间由功率输出级产生的功率级电压输出，在PWM模式下控制功率输出级。 辅助电压输出级在第三时间段内产生辅助电压，其中PWM控制器在第三时间段期间使用辅助电压来控制辅助功率输出级。
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公开(公告)号：US20150123627A1
公开(公告)日：2015-05-07
申请号：US14070191
申请日：2013-11-01
Applicant: Texas Instruments Incorporated
Inventor： Srinivas Venkata Veeramreddi , Sudhir Polarouthu
IPC: H02M3/04
CPC classification number: H02M3/1582
Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
Abstract translation: 在一个实施例中，电路包括直流（DC）-DC降压 - 升压转换器和控制器。 该控制器包括误差放大器，该误差放大器被配置为响应于降压 - 升压转换器的输出信号接收反馈信号。 误差放大器被配置为比较反馈信号和参考信号以产生误差信号。 控制器包括调制器电路，其被配置为接收误差信号并将误差信号与周期性斜坡信号进行比较以产生调制信号。 控制器还包括数字逻辑块，用于响应于馈送到降压 - 升压转换器的调制信号产生开关信号，以控制降压 - 升压转换器的输出信号。 控制器包括耦合到误差放大器的输出的电容倍增器电路，以配置主极以补偿降压 - 升压转换器。
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公开(公告)号：US10811967B2
公开(公告)日：2020-10-20
申请号：US16118759
申请日：2018-08-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi
Abstract: Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating a second voltage output. The power converter further includes a pulse frequency modulation (PFM) controller for controlling the power output stage in response to the first voltage output generated by the power output stage during a first period of time in which the power output stage operates in a PFM mode, and a pulse width modulation (PWM) controller for controlling the auxiliary power output stage in response to the second voltage output generated by the auxiliary power output stage during a second period of time. At least a portion of the first period of time is concurrent with the second period of time.
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Patent Agency Ranking
公开(公告)号：US10715194B2
公开(公告)日：2020-07-14
申请号：US15858246
申请日：2017-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Debapriya Sahu , Srinivas Venkata Veeramreddi , Raghu Ganesan
Abstract: A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.
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公开(公告)号：US09882490B2
公开(公告)日：2018-01-30
申请号：US15160836
申请日：2016-05-20
Applicant: Texas Instruments Incorporated
CPC classification number: H02M3/1588 , H02M1/08 , Y02B70/1466
Abstract: A power stage for a DC-to-DC voltage converter includes a voltage input, a high-side n-channel transistor, a high-side p-channel transistor, and a low-side n-channel transistor. The voltage input is couplable to a supply voltage. The drain terminal of the high-side n-channel transistor is coupled to the voltage input and the source terminal is coupled to a first node that is couplable to an output stage of the DC-to-DC converter. The source terminal of the high-side p-channel transistor is coupled to the voltage input and the drain terminal is coupled to the first node. The drain terminal of the low-side n-channel transistor is coupled to the first node and the source terminal is coupled to a ground.
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8.发明授权Switch pairs between resistor network and high/low DC converter comparator input 有权电阻网络与高/低直流转换器比较器输入之间的开关对公开(公告)号：US09048728B2
公开(公告)日：2015-06-02
申请号：US13647156
申请日：2012-10-08
Applicant: Texas Instruments Incorporated
Inventor： Harikrishna Parthasarathy , Srinivas Venkata Veeramreddi , Sudhir Polarouthu , Baher S. Haroun
CPC classification number: H02M3/1563
Abstract: Two hysteresis levels, a high level and a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using pairs of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.
Abstract translation: 可以使用两个滞后电平（高电平和低电平）来设置DC-DC转换器的输出电压的周期（和开关频率）以及转换器的输出纹波。 这两个阈值可以使用成对的开关来改变。 通过控制开关的导通时间的顺序和持续时间，可以控制输出中的频谱杂散，并且可以减小感兴趣的幅度和频带。 通过对开关的控制进行随机化，可以实现额外的齿间减少。
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公开(公告)号：US11588392B2
公开(公告)日：2023-02-21
申请号：US17108028
申请日：2020-12-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Subhash Sahni
Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
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公开(公告)号：US11444537B2
公开(公告)日：2022-09-13
申请号：US16806010
申请日：2020-03-02
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Srinivas Venkata Veeramreddi , Sudhir Polarouthu
IPC: H02M3/158
Abstract: In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
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