摘要:
A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.
摘要:
A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
摘要:
A power conversion system includes, for example, a PFM controller, a PWM controller, and an auxiliary voltage output stage. The PFM controller controls a power output stage in a PFM mode in response to a power stage voltage output generated by the power output stage during a first period of time in which the power output stage is operating in the PFM mode. The PWM controller controls the power output stage in a PWM mode in response to a power stage voltage output generated by the power output stage during a second period of time in which the power output stage is operating in the PWM mode. The auxiliary voltage output stage generates an auxiliary voltage during a third period of time , where the PWM controller controls the auxiliary power output stage using the auxiliary voltage during the third period of time.
摘要:
In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
摘要:
A device includes a frequency multiplier circuit to receive a base frequency signal, multiply the base frequency signal, and output the multiple of the base frequency signal, and includes an offset frequency generator, including at least one logic gate, to receive the multiple of the base frequency signal and output an offset frequency signal from the at least one logic gate combination. A mixing circuit receives the offset frequency signal and a digital data signal, converts the digital data signal into an analog representation of the digital data signal, and mixes the offset frequency signal and the analog representation of the digital data signal to produce a mixed signal. The device yet further includes a power amplifier to amplify the mixed signal and output the amplified mixed signal as an output frequency signal of the device.
摘要:
A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
摘要:
A wireless transceiver. The transceiver includes: (i) a transmit signal path; (ii) a calibration path, comprising a conductor to connect a calibration tone into the transmit signal path; (iii) a receive signal path, comprising a first data signal path to process a first data and a second data signal path, different than the first data signal path, to process a second data; (iv) a first capacitive coupling to couple a response to the calibration tone from the transmit signal path to the first data signal path; and (v) a second capacitive coupling to couple a response to the calibration tone from the transmit signal path to the second data signal path.
摘要:
In an embodiment, a circuit includes a Direct Current (DC)-DC buck-boost converter and a controller. The controller includes an error amplifier configured to receive a feedback signal responsive to an output signal of the buck-boost converter. The error amplifier is configured to compare the feedback signal and a reference signal to generate an error signal. The controller includes a modulator circuit that is configured to receive the error signal and compare the error signal with a periodic ramp signal to generate a modulated signal. The controller further includes a digital logic block to generate switching signals in response to the modulated signal that is fed to the buck-boost converter to control the output signal of the buck-boost converter. The controller includes a capacitance multiplier circuit coupled to the output of the error amplifier to configure a dominant pole so as to compensate the buck-boost converter.
摘要:
As disclosed herein, two hysteresis levels, a high level a low level, may be used to set a period (and the switching frequency) of the output voltage of a DC-DC converter, as well as the output ripple of the converter. These two thresholds may be changed using a set of switches. By controlling the sequence and the duration of the on-time of the switches, spectral spurs in the output can be controlled and the amplitude and the frequency band of interest can be reduced. Additional spur reduction may be possible by randomizing the control of the switches.
摘要:
Disclosed embodiments of a power converter include a power output stage for generating a first voltage output and an auxiliary power output stage for generating a second voltage output. The power converter further includes a pulse frequency modulation (PFM) controller for controlling the power output stage in response to the first voltage output generated by the power output stage during a first period of time in which the power output stage operates in a PFM mode, and a pulse width modulation (PWM) controller for controlling the auxiliary power output stage in response to the second voltage output generated by the auxiliary power output stage during a second period of time. At least a portion of the first period of time is concurrent with the second period of time.