Zero current detector with pre-charge circuit

    公开(公告)号:US12261520B2

    公开(公告)日:2025-03-25

    申请号:US18171752

    申请日:2023-02-21

    Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

    ZERO CURRENT DETECTION
    3.
    发明公开

    公开(公告)号:US20230208277A1

    公开(公告)日:2023-06-29

    申请号:US18171752

    申请日:2023-02-21

    CPC classification number: H02M1/083 H02M3/158 H02M1/0009

    Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

    Glitch immune non-overlap operation of transistors in a switching regulator

    公开(公告)号:US11101726B2

    公开(公告)日:2021-08-24

    申请号:US16589799

    申请日:2019-10-01

    Abstract: A circuit includes a first gate control circuit including a first time delay element and first and second logic gates. The first time delay element and first and second logic gates receive a pulse width modulation (PWM) signal. The first logic gate includes a first output and second logic gate includes a second output. The circuit also includes a second gate control circuit that includes a second time delay element and third and fourth logic gates. The second time delay element includes an input coupled to the output of the first time delay element. The third logic gate includes a third output, and the fourth logic gate includes a fourth output. A first gate driver receives a first signal from one of the first or third outputs. A second gate driver receives a second signal from one of the second or fourth outputs.

    Zero current detector with a gate pre-charge circuit

    公开(公告)号:US11588392B2

    公开(公告)日:2023-02-21

    申请号:US17108028

    申请日:2020-12-01

    Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

    ZERO CURRENT DETECTOR
    6.
    发明申请

    公开(公告)号:US20210083565A1

    公开(公告)日:2021-03-18

    申请号:US17108028

    申请日:2020-12-01

    Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

    Zero current detector
    7.
    发明授权

    公开(公告)号:US10855164B2

    公开(公告)日:2020-12-01

    申请号:US16122953

    申请日:2018-09-06

    Abstract: A switch-mode power supply and a zero current detector for use therein. A zero current detector includes an input stage and an output stage. The output stage is coupled to the input stage. The output stage includes a detector output terminal, a first transistor, and a second transistor. The first transistor includes an input terminal and a control terminal. The input terminal is coupled to the detector output terminal. The control terminal is coupled to the input stage. The second transistor includes an input terminal, a control terminal, and an output terminal. The input terminal is coupled to the control terminal of the first transistor. The control terminal is coupled to the input terminal of the second transistor. The output terminal is coupled to ground.

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