MODULATING DRIVE SIGNALS FOR POWER CONVERTERS

    公开(公告)号:US20250070635A1

    公开(公告)日:2025-02-27

    申请号:US18453776

    申请日:2023-08-22

    Abstract: A circuit includes a high-side driver having a high-side slew control input, a high-side drive input and a high-side drive output. A low-side driver has a low-side slew control input, a low-side drive input and a low-side drive output. Drive control circuitry has a high-side drive control output, a low-side drive control output, and a slew control output. The high-side drive control output is coupled to the high-side drive input, the low-side drive control output is coupled to the low-side drive input. The slew control output is coupled to at least one of the high-side slew control input and the low-side slew control input, and the drive control circuitry is configured to provide a slew control signal at the slew control output. The high-side and/or low-side driver is configured to modulate a slew rate of a drive signal at a respective drive output thereof based on the slew control signal.

    LOW NOISE GATE DRIVER CIRCUITS
    2.
    发明公开

    公开(公告)号:US20240146177A1

    公开(公告)日:2024-05-02

    申请号:US18050220

    申请日:2022-10-27

    CPC classification number: H02M1/08 H02M1/0054 H02M1/44

    Abstract: A gate driver circuit includes a charge pump circuit, a gate pull-up transistor, a resistor, and a capacitor. The charge pump circuit includes an output. The gate pull-up transistor includes a first current terminal, a second current terminal, and a control terminal. The first current terminal is coupled to the output of the charge pump circuit. The second current terminal is coupled to a gate drive output terminal. The resistor is coupled between the power input terminal and the control terminal. The capacitor is coupled between the control terminal and a ground terminal.

    MULTIPHASE POWER REGULATOR WITH DISCONTINUOUS CONDUCTION MODE CONTROL

    公开(公告)号:US20180294726A1

    公开(公告)日:2018-10-11

    申请号:US15853494

    申请日:2017-12-22

    Abstract: A multiphase power regulator includes a plurality of phases coupled in parallel to provide a load current as a combination of phase currents at an output voltage, each phase including at least one power transistor switched to provide a respective phase current based at least in part on a comparator output signal, and a current-sense low pass filter to sense the phase current. The regulator further includes a gm stage to generate the current set point voltage based at least in part on the output voltage, a comparator to compare a voltage from the current-sense low pass filters to the current set point voltage and a current set point adjustment circuit to provide an auxiliary control signal to decrease the current set point voltage responsive to a change in comparator output and then to increase the current set point voltage responsive to another change in comparator output.

Patent Agency Ranking