公开(公告)号：US11569741B2

公开(公告)日：2023-01-31

申请号：US16950660

申请日：2020-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Neil Gibson ,  Stefan Herzer

IPC: H02M3/158

Abstract: In some examples, a circuit comprises a first field effect transistor (FET) having a first gate adapted to couple to a reference voltage source, a first source coupled to a first current source, and a first drain coupled to a second current source. The circuit comprises a second FET having a second gate coupled to the first drain, a second drain coupled to the first current source, and a second source coupled to a first resistor. The circuit comprises a third FET having a third gate adapted to couple to a feedback loop of a voltage converter, a third source coupled to a third current source, and a third drain coupled to a fourth current source. The circuit comprises a fourth FET having a fourth gate coupled to the third drain, a fourth drain coupled to the third current source, and a fourth source coupled to a second resistor.

公开(公告)号：US20220059439A1

公开(公告)日：2022-02-24

申请号：US17000146

申请日：2020-08-21

Applicant: Texas Instruments Incorporated

Inventor： Robert Allan Neidorff ,  Benjamin Cook ,  Stefan Herzer

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00

Abstract: A method includes performing a non-screen printing process that deposits solder on a lead frame or on conductive features of a semiconductor die or wafer, or on or in a conductive via of a laminate structure. The method further comprises engaging the semiconductor die to the lead frame, performing a thermal process that reflows the solder, performing a molding process that forms a package structure which encloses the semiconductor die and a portion of the lead frame, and separating a packaged electronic device from a remaining portion of the lead frame.

公开(公告)号：US11581810B2

公开(公告)日：2023-02-14

申请号：US17376549

申请日：2021-07-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Neil Gibson ,  Stefan Herzer

IPC: H02M3/158 ,  H02M1/00 ,  H02M3/156

Abstract: A voltage regulation circuit includes a switching output terminal, a high-side output transistor, a low-side output transistor, a high-side replica transistor, a low-side replica transistor, and a comparator circuit. The high-side output transistor is configured to drive the switching output terminal. The low-side output transistor is configured to drive the switching output terminal. The high-side replica transistor is coupled to the high-side output transistor. The low-side replica transistor is coupled to the high-side replica transistor and the low-side output transistor. The comparator circuit is coupled to the high-side replica transistor and the low-side replica transistor, and is configured to compare a signal received from both the high-side replica transistor and the low-side replica transistor to a ramp signal.

公开(公告)号：US11195958B2

公开(公告)日：2021-12-07

申请号：US17023639

申请日：2020-09-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Binghua Hu ,  Alexei Sadovnikov ,  Abbas Ali ,  Yanbiao Pan ,  Stefan Herzer

IPC: H01L29/66 ,  H01L29/94 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/423

Abstract: A semiconductor device with an isolation structure and a trench capacitor, each formed using a single resist mask for etching corresponding first and second trenches of different widths and different depths, with dielectric liners formed on the trench sidewalls and polysilicon filling the trenches and deep doped regions surrounding the trenches, including conductive features of a metallization structure that connect the polysilicon of the isolation structure trench to the deep doped region to form an isolation structure.

公开(公告)号：US10992229B2

公开(公告)日：2021-04-27

申请号：US16655876

申请日：2019-10-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Gerhard Thiele ,  Manuel Wiersch ,  Antonio Priego ,  Johann Erich Bayer ,  Stefan Herzer

IPC: H02M3/156 ,  H02M1/00 ,  H02M3/158

Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.

公开(公告)号：US10148177B2

公开(公告)日：2018-12-04

申请号：US15392074

申请日：2016-12-28

Applicant: Texas Instruments Incorporated

Inventor： Stefan Herzer ,  Michael Couleur ,  Antonio Priego

IPC: H02M3/158

Abstract: A multi-phase power converter includes a plurality of power channels arranged in parallel to drive an output of the power converter, and a channel selection circuit. Each of the power channels includes a driver, a feedback control circuit coupled to an output of the driver, and a comparator coupled to the feedback control circuit. The channel selection circuit is coupled to the feedback control circuit of each of the power channels. The channel control circuit is configured to: select a different specific one of the power channels to activate in each of a plurality of phases, and introduce an offset voltage into each of the feedback control circuits, except the feedback control circuit of the specific one of the power channels. The feedback control circuit is configured to apply the offset to bias driver output feedback voltage away from a threshold voltage at which the power channel is activated.

公开(公告)号：US09369043B2

公开(公告)日：2016-06-14

申请号：US13658331

申请日：2012-10-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Michael Couleur ,  Stefan Herzer ,  Nicola Florio

IPC: G06F3/08 ,  H02M3/158

CPC classification number: H02M3/1584

Abstract: A DC-DC converter includes a first differential voltage sensor to detect a first inductor current by sensing a first differential voltage across a first power stage of the DC-DC converter. A second differential voltage sensor detects a second inductor current by sensing a second differential voltage across a second power stage of the DC-DC converter. An integrator stage combines the first differential voltage from the first power stage and the second differential voltage from the second power stage to generate a compensation signal to adjust current balancing for the DC-DC converter.

Abstract translation: DC-DC转换器包括第一差分电压传感器，用于通过感测DC-DC转换器的第一功率级的第一差分电压来检测第一电感器电流。 第二差分电压传感器通过感测DC-DC转换器的第二功率级的第二差分电压来检测第二电感器电流。 积分器级将来自第一功率级的第一差分电压和来自第二功率级的第二差分电压组合以产生补偿信号，以调整DC-DC转换器的电流平衡。

公开(公告)号：US20250120157A1

公开(公告)日：2025-04-10

申请号：US18610150

申请日：2024-03-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jonas Höhenberger ,  Ujwal Radhakrishna ,  Michael Lueders ,  Meng-Chia Lee ,  Chang Soo Suh ,  Zhikai Tang ,  Jungwoo Joh ,  Timothy Bryan Merkin ,  Stefan Herzer ,  Bernhard Ziegltrum ,  Helmut Rinck ,  Michael Hans Enzelberger-Heim ,  Ercuement Hasanoglu

IPC: H01L29/40 ,  H01L21/027 ,  H01L21/311 ,  H01L29/20 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure generally relates to a semiconductor device having a slanted field plate. In an example, a semiconductor device includes a semiconductor substrate, a gate, a drain contact, a source contact, and a field plate. The gate is on a surface of the semiconductor substrate. The drain contact and a source contact are on the semiconductor substrate. The field plate is over the surface of the semiconductor substrate and extends from one side of the gate towards the drain contact. The field plate includes multiple field plate portions. Each of the multiple field plate portions has a uniform respective slope with respect to the surface, and the multiple field plate portions have different slopes.

公开(公告)号：US20240405663A1

公开(公告)日：2024-12-05

申请号：US18325226

申请日：2023-05-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ting-Li Hsu ,  Qiao Yang ,  Stefan Herzer ,  Hans Schmeller

IPC: H02M1/14 ,  H02M1/00 ,  H02M1/088 ,  H02M3/158

Abstract: An integrated circuit includes an error amplifier having a reference input, a feedback input, and an error output. A comparator has first and second comparator inputs and a comparator output. The first comparator input is coupled to the error output. A control circuit has a control input and a control output. The control input is coupled to the comparator output. The compensation circuit has a compensation control input and a compensation output. The compensation control input is coupled to the control output. The compensation output is coupled to at least one of the reference input, the feedback input, or the error output.

公开(公告)号：US20240313660A1

公开(公告)日：2024-09-19

申请号：US18141245

申请日：2023-04-28

Applicant: Texas Instruments Incorporated

Inventor： Laszlo Balogh ,  Michael Lueders ,  Stefan Herzer ,  Maik Peter Kaufmann

IPC: H02M3/335 ,  H02M1/00 ,  H02M1/36

CPC classification number: H02M3/33576 ,  H02M1/0009 ,  H02M1/0025 ,  H02M1/36

Abstract: A self-biasing circuit for power converters is disclosed. In an example, an apparatus includes a first transistor coupled between an inductor terminal and a ground terminal, and a second transistor coupled between the inductor terminal and a bias terminal. The first transistor has a first control terminal, and the second transistor has a second control terminal. In an example, the first and second transistors are configured to split a current at the inductor terminal. The apparatus further includes a controller having first and second control outputs, where the first control output is coupled to the first control terminal, the second control output is coupled to the second control terminal.