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公开(公告)号：US20170194983A1
公开(公告)日：2017-07-06
申请号：US15463780
申请日：2017-03-20
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
IPC: H03M3/00
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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Patent Agency Ranking
2.发明申请AMPLIFIER SHARING TECHNIQUE FOR POWER REDUCTION IN ANALOG-TO-DIGITAL CONVERTER 有权用于模拟数字转换器中功率降低的放大器共享技术公开(公告)号：US20170041012A1
公开(公告)日：2017-02-09
申请号：US15231166
申请日：2016-08-08
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
Abstract translation: 双Δ-Δ调制器包括第一调制器，第二调制器和耦合到第一和第二调制器的共享放大器。 第一调制器包括被配置为产生第一调制器输出信号的积分器。 第二调制器包括被配置为产生第二调制器输出信号的第二积分器。 共享放大器被配置为辅助第一积分器在第一时间段期间积分第一模拟输入信号和来自第一调制器的第一调制器输出信号之间的差异，并且辅助第二积分器将第二模拟输入信号 以及在第二时间段期间来自第二调制器的第二调制器输出信号。
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公开(公告)号：US09979411B1
公开(公告)日：2018-05-22
申请号：US15394100
申请日：2016-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Amit Kumar Gupta , Peng Cao , Venkata Krishnan Kidambi Srinivasan
IPC: H03M3/00
Abstract: An exemplary circuit includes a tracking circuit, a current estimator, a switch control logic, and a switching load circuit. The tracking circuit tracks a digital output signal of a delta-sigma modulator (DSM) and provides a tracking signal representing an average of the digital output signal during a time period. The current estimator determines an amount of loading to be applied to positive and negative reference voltages based on the tracking signal. The switching load circuit is coupled to positive and negative reference voltages of the DSM, the switching load circuit connects a selected amount of loading to the positive and negative reference voltages in response to a control signal to balance a reference load current applied to the DSM. The switch control logic provides the control signal to the switching load circuit based on the determined amount of loading to be applied to the positive and negative reference voltages.
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公开(公告)号：US11005642B1
公开(公告)日：2021-05-11
申请号：US16900082
申请日：2020-06-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Abstract: A circuit includes a source device coupled to an output circuit. The source device is configured to produce a sequence of digital values at a rate defined by a data period. The output circuit is configured to receive the sequence of digital values from the source device, generate a copy of each digital value at a predetermined point during the respective data period, and responsive to initiation of a data transaction during a given data period but before the predetermined point, output the digital value from the source device, whereas responsive to initiation of a data transaction during the given data period but after the predetermined point, output the copy of the digital value.
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公开(公告)号：US09893741B2
公开(公告)日：2018-02-13
申请号：US15463780
申请日：2017-03-20
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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公开(公告)号：US09602118B2
公开(公告)日：2017-03-21
申请号：US15231166
申请日：2016-08-08
Applicant: Texas Instruments Incorporated
Inventor： Peng Cao , Amit Kumar Gupta , Venkata Krishnan Kidambi Srinivasan
Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
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