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公开(公告)号：US12101105B2
公开(公告)日：2024-09-24
申请号：US17967095
申请日：2022-10-17
摘要： A delta-sigma modulation type A/D converter includes: a capacitively coupled amplifier having a sampling capacitor, a feedback capacitor, and an amplifier; a correlated double sampling type first integrator as a first-stage integrator, which is connected to the capacitively coupled amplifier without a switch; a second integrator arranged after the first integrator; a quantizer arranged after the second integrator and quantizing an output of the second integrator; and an D/A converter that D/A-converts an output of the quantizer and feeds back to any one of the capacitively coupled amplifier, the first integrator, and the second integrator.
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公开(公告)号：US12088326B2
公开(公告)日：2024-09-10
申请号：US17940236
申请日：2022-09-08
发明人： Ankur Bal , Abhishek Jain
CPC分类号： H03M3/464 , H03K3/356 , H03M1/0626 , H03M3/43
摘要： A continuous time, sigma-delta analog-to-digital converter circuit includes a sigma-delta modulator circuit configured to receive an analog input signal. A single bit quantizer of the modulator generates a digital output signal at a sampling frequency. A data storage circuit stores bits of the digital output signal and digital-to-analog converter (DAC) elements are actuated in response to the stored bits to generate an analog feedback signal for comparison to the analog input signal. A filter circuit includes polyphase signal processing paths and a summation circuit configured to sum outputs from the polyphase signal processing paths to generate a converted output signal. A fan out circuit selectively applies the stored bits from the data storage circuit to inputs of the polyphase signal processing paths of the filter circuit.
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公开(公告)号：US12088324B2
公开(公告)日：2024-09-10
申请号：US17820975
申请日：2022-08-19
IPC分类号： H03M3/00
摘要： In accordance with an embodiment, a delta-sigma modulator includes: an analog loop filter comprising an outer portion and an inner portion having an input coupled to the outer portion; a quantizer coupled to an output of the inner portion of the analog loop filter; an outer feedback path coupled between an output of the quantizer and an input to the outer portion of the analog loop filter; and a compensation filter coupled between an output of the quantizer and an input of the inner portion of the analog loop filter. The compensation filter has a transfer function configured to correct for an effect of excess loop delay (ELD) on the delta-sigma modulator.
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公开(公告)号：US12063053B2
公开(公告)日：2024-08-13
申请号：US17877241
申请日：2022-07-29
申请人： DENSO CORPORATION
发明人： Yuu Fujimoto , Tomohiro Nezuka , Kunihiko Nakamura
摘要： An analog-to-digital converter includes a primary converter and a secondary converter. The primary converter executes conversion processing to convert an analog input signal to a first digital signal through delta-sigma modulation. The secondary converter outputs a second digital signal by converting amplified analog output of a quantization error in the primary converter to the second digital signal.
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公开(公告)号：US20240007126A1
公开(公告)日：2024-01-04
申请号：US18452458
申请日：2023-08-18
申请人： Wacom Co., Ltd.
发明人： Takeshi KOIKE
摘要： A delta-sigma modulation circuit is enabled to be used to detect a pen signal. An integrated circuit according to the present disclosure is a sensor controller that detects pen signals transmitted from an active pen. The integrated circuit includes a delta-sigma modulation circuit including a subtractor that subtracts a feedback signal from a received signal input from a sensor, an integrator that integrates an output signal of the subtractor, a quantizer that quantizes an output signal of the integrator, and a digital analog converter that generates the feedback signal based on an output value of the quantizer. The integrated circuit also has a processor that detects a level of the received signal based on an output value of the delta-sigma modulation circuit, and a gain controller that a level of the feedback signal based on the level of the received signal detected by the processor.
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公开(公告)号：US20230421171A1
公开(公告)日：2023-12-28
申请号：US17809488
申请日：2022-06-28
IPC分类号： H03M3/00
CPC分类号： H03M3/464
摘要： Techniques to deliver a precision low noise reference voltage to a precision analog-to-digital converter without the need of a reference buffer or digital correction. In an example, a technique can use an integrated resistor divider and external capacitor to derive a low noise precision reference voltage either from the power supply of the ADC, or from an integrated reference source.
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7.发明授权公开(公告)号：US11728823B2
公开(公告)日：2023-08-15
申请号：US17534635
申请日：2021-11-24
CPC分类号： H03M3/34 , H03M1/0626 , H03M3/356 , H03M3/464
摘要： Apparatuses and methods for analog-digital conversion and corresponding systems having a sensor and an apparatus of this type are provided. Demodulation is executed with no variable preamplification, followed by continuous-time analog-digital conversion, at least in time segments, which further employs chopper techniques.
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公开(公告)号：US20230231572A1
公开(公告)日：2023-07-20
申请号：US18148604
申请日：2022-12-30
发明人： Young Hyun YOON
摘要： A semiconductor device such as a sigma delta A/D converter comprises an integrator configured to output first and second output signals, a quantizer configured to generate a first digital signal based on the output signals, first and second switches configured to control application of first and second reference voltages to a first resistor based on respective first and second control signals, and a third switch configured to control connection between the first resistor and a first input terminal of the integrator based on a third control signal. The first through third control signals are generated based on the first digital signal and a second digital signal obtained by delaying the first digital signal. The third switch is turned on when any one of the first and second switches is turned on, and is turned off when both the first and second switches are turned off.
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公开(公告)号：US20190242859A1
公开(公告)日：2019-08-08
申请号：US16343832
申请日：2016-10-28
发明人： Glen Eugene Schmidt
IPC分类号： G01N30/66
CPC分类号： G01N30/66 , G01N2030/025 , G01N2030/626 , G01R17/10 , H03M3/30 , H03M3/464
摘要： A Gas Chromatograph (GC) detector comprises a first circuit, a second circuit, a digital subtractor and a digital logic shared between one to many detector channels to provide a GC measurement in a digital form. The first circuit includes a first counter circuitry to provide a first counter output. The second circuit includes a second counter circuitry to provide a second counter output. The GC detector includes a digital subtractor to subtract the first counter output from the second counter output and provide a digital subtractor output. The GC detector further includes a digital logic shared between one to many detector channels to implement at least a portion of the first counter circuitry and the second counter circuitry. The digital logic to receive the digital subtractor output and provides the GC measurement in the digital form. The GC detector may be based on a Thermal Conductivity Detector (TCD) in which an integrator of a Sigma-Delta (Σ-Δ) A/D converter is eliminated and the/factor of the Sigma-Delta (Σ-Δ) A/D converter is accomplished in a digital form.
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公开(公告)号：US20190116420A1
公开(公告)日：2019-04-18
申请号：US16218615
申请日：2018-12-13
发明人： Mohit CHAWLA
CPC分类号： H04R3/007 , H03F3/187 , H03F3/2171 , H03F3/2173 , H03F3/2175 , H03F3/45475 , H03F2200/03 , H03F2200/405 , H03F2203/45116 , H03F2203/45546 , H03F2203/45594 , H03M3/43 , H03M3/45 , H03M3/452 , H03M3/464 , H04R29/001
摘要： A class-D amplifier includes measurement of speaker current via the low-side drive transistors of the amplifier. In one embodiment, a class-D amplifier includes two high-side transistors, two low-side transistors, a first sense resistor, a second sense resistor, and a sigma delta analog to digital converter (ΣΔ ADC). The two high-side transistors and two low-side transistors are connected as a bridge to drive a bridge tied speaker. The first sense resistor is connected between a first of the low-side transistors and a low-side reference voltage. The second sense resistor is connected between a second of the low-side transistors and the low-side reference voltage. The ΣΔ ADC is coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor.
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