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公开(公告)号：US20250112600A1
公开(公告)日：2025-04-03
申请号：US18476825
申请日：2023-09-28
Applicant: Texas Instruments Incorporated
Inventor： Pourya Assem , Yogesh Ramadass , Kevin Scoones , Tim Merkin , Zejian Wang , Jianquan Liao , Yinglai Xia
Abstract: An apparatus includes a first power stage circuit having a first output and a power terminal, and a second power stage circuit having a second output and the power terminal. The apparatus further includes a control circuit having a control input, a first control output, and a second control output. In an example, the control input is coupled to the power terminal, the first control output is coupled to the first output, and the second control output is coupled to the second output. In an example, the control circuit is configured to, responsive to a first voltage at the power terminal being below a threshold voltage, set the first and second outputs to a second voltage.
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公开(公告)号：US12003222B2
公开(公告)日：2024-06-04
申请号：US17402264
申请日：2021-08-13
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass
CPC classification number: H03F3/2178 , H03F3/387 , H03F3/72 , H03F2200/03 , H03F2203/7206
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to generate a modulation protocol to output audio. An example apparatus includes a modulation circuit including a first input, a second input, a first output, and a second output; a first gate coupled to the first output of the modulation circuit; a second gate coupled to the second output of the modulation circuit; a first multiplexer including a first input coupled to the first output of the modulation circuit, a second input coupled to the output of the second gate, and an output coupled to a first switch; and a second multiplexer including a first input coupled to the second output of the modulation circuit, a second input coupled to the output of the first gate, and an output coupled to a second switch.
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公开(公告)号：US20240088878A1
公开(公告)日：2024-03-14
申请号：US18512158
申请日：2023-11-17
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Junmin Jiang
CPC classification number: H03K4/08 , H03F3/2173 , H03L7/081 , H03L7/0891 , H03L7/099 , H03F2200/03 , H03K19/20
Abstract: In one example, an apparatus comprises a power stage having a first power stage input, a second power stage input, and a power stage output. The apparatus also comprises a modulator circuit having a first ramp input, a second ramp input, a modulator input, a first modulator output, and a second modulator output, the first modulator output coupled to the first power stage input, and the second modulator output coupled to the second power stage input. The apparatus also comprises a multi-level ramp generator having a first ramp output and a second ramp output, the first ramp output coupled to the first ramp input, and the second ramp output coupled the second ramp input.
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公开(公告)号：US11824543B2
公开(公告)日：2023-11-21
申请号：US17832280
申请日：2022-06-03
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Junmin Jiang
CPC classification number: H03K4/08 , H03F3/2173 , H03L7/081 , H03L7/0891 , H03L7/099 , H03F2200/03 , H03K19/20
Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
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公开(公告)号：US20230065567A1
公开(公告)日：2023-03-02
申请号：US17461495
申请日：2021-08-30
Applicant: Texas Instruments Incorporated
Inventor： Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Yinglai Xia
Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
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Patent Agency Ranking
公开(公告)号：US20240413800A1
公开(公告)日：2024-12-12
申请号：US18808183
申请日：2024-08-19
Applicant: Texas Instruments Incorporated
Inventor： Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Yinglai Xia
Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
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公开(公告)号：US12095429B2
公开(公告)日：2024-09-17
申请号：US17461495
申请日：2021-08-30
Applicant: Texas Instruments Incorporated
Inventor： Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Yinglai Xia
CPC classification number: H03F3/2171 , H03F1/0205 , H04R3/00 , H03F2200/03
Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
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公开(公告)号：US11356082B2
公开(公告)日：2022-06-07
申请号：US17119604
申请日：2020-12-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Yinglai Xia , Shailendra Kumar Baranwal , Yogesh Kumar Ramadass , Junmin Jiang
Abstract: A device includes a first ramp generator having a first ramp generator output configured to provide a first ramp, a second ramp generator having a second ramp generator output configured to provide a second ramp, and a third ramp generator having a third ramp generator output configured to provide a third ramp. The first ramp is a sawtooth voltage waveform having a first common mode voltage and a first peak-to-peak voltage. The second ramp is a sawtooth voltage waveform having a second common mode voltage and a second peak-to-peak voltage. The third ramp is a sawtooth voltage waveform having a third common mode voltage and a third peak-to-peak voltage. A frequency of the second ramp is approximately equal to a frequency of the third ramp, and the frequency of the third ramp is approximately double a frequency of the first ramp.
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公开(公告)号：US20240356511A1
公开(公告)日：2024-10-24
申请号：US18761382
申请日：2024-07-02
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass
CPC classification number: H03G3/34 , H03F3/217 , H03F2200/03
Abstract: In one example, an apparatus comprises a control circuit, a first power stage, and a second power stage. The control circuit has an input, first control outputs, and second control outputs, the control circuit including a modulated signal generator coupled between the input and the first control outputs and an amplifier coupled between the input and the second control outputs. The first power stage has first control inputs and a first power stage output, the first control inputs coupled to the first control outputs. And the second power stage has second control inputs and a second power stage output, the second control inputs coupled to the second control outputs.
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公开(公告)号：US11716023B2
公开(公告)日：2023-08-01
申请号：US17348122
申请日：2021-06-15
Applicant: Texas Instruments Incorporated
Inventor： Yinglai Xia , Yogesh Ramadass , Jessica Danielle Boles
Abstract: A power converter including a piezoelectric resonator. The power converter includes a first transistor coupled between an input terminal and a first plate of the piezoelectric resonator, and a second transistor coupled between the first plate of the piezoelectric resonator and an output terminal. A load may be coupled at the output terminal. Controller circuitry has inputs coupled to the input node, the output node, and to the first plate of the piezoelectric resonator, and outputs coupled to control terminals of the first and second transistors. The controller circuitry operates to turn on the first transistor responsive to a comparison of voltages at the first plate and the input terminal, turn on the second transistor responsive to a comparison of voltages at the first plate and the output terminal, and turn off one of the first and second transistors responsive to an output level at the output terminal.
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