公开(公告)号：US08547125B2

公开(公告)日：2013-10-01

申请号：US12694149

申请日：2010-01-26

申请人： Tadashi Morita ,  Tetsuya Koishi ,  Takeshi Yaguchi

发明人： Tadashi Morita ,  Tetsuya Koishi ,  Takeshi Yaguchi

IPC分类号： G01R31/3187

CPC分类号： G01R31/31907

摘要： Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.

摘要翻译： 提供了一种用于测试至少一个被测设备的测试装置，包括：包括多个测试部分的测试模块，所述多个测试部分通过与被测设备交换信号来测试被测设备; 以及多个测试控制部分，其控制所述多个测试部分，其中所述测试模块包括所述多个测试部分; 设置存储部，其存储关于所述多个测试控制部中的哪个应当与所述多个测试部中的每一个相关联的设置; 以及连接到所述多个测试部分的接口部分，提供从所述多个测试控制部分中的一个发出并且被引导到所述测试模块的访问请求到与所述测试控制部分相关联的测试部分，并且能够 对于多个测试部分中的每个测试部分独立设置，多个测试控制部分中的哪一个应该控制测试部分。

公开(公告)号：US07728615B2

公开(公告)日：2010-06-01

申请号：US12047330

申请日：2008-03-13

申请人： Tetsuya Koishi

发明人： Tetsuya Koishi

IPC分类号： G01R31/02

CPC分类号： G01R31/2887

摘要： Provided is a test apparatus that tests a device under test, including a test head that generates a test signal for testing the device under test; a socket board onto which is mounted the device under test, that transmits signals between the test head and the device under test; a plurality of actuators that are disposed on a lower surface of the socket board to correspond one-to-one with support positions thereof, and that each have a state thereof changed according to a control signal supplied thereto to independently move the corresponding support position in a direction vertical to the lower surface of the socket board; and a connection control section that supplies a first control signal to each actuator to set each actuator to be in the same state, and thereafter supplies commonly to each actuator a second control signal that gradually decreases an apparatus separation distance between the socket board and the test head.

摘要翻译： 提供了一种测试被测设备的测试装置，包括产生用于测试被测设备的测试信号的测试头; 在其上安装被测器件的插座板，其在测试头和被测器件之间传输信号; 多个致动器，其设置在所述插座板的下表面上，以与其支撑位置一一对应，并且每个致动器的状态根据提供给其的控制信号而改变，以独立地将相应的支撑位置移动到 垂直于插座板的下表面的方向; 以及连接控制部，其向每个致动器提供第一控制信号，以将每个致动器设置在相同的状态，然后向每个致动器共同供给第二控制信号，该第二控制信号逐渐减小插座板和测试之间的设备间隔距离 头。

公开(公告)号：US5463639A

公开(公告)日：1995-10-31

申请号：US234043

申请日：1994-04-28

申请人： Tetsuya Koishi ,  Noboru Akiyama ,  Yasuto Kumai

发明人： Tetsuya Koishi ,  Noboru Akiyama ,  Yasuto Kumai

IPC分类号： G06F11/24 ,  G01R31/28

CPC分类号： G06F11/24

摘要： An automatic pattern synchronizing circuit re-times the phase differences between clocks, thereby adjusting test pattern outputs from a device under test. The automatic pattern synchronizing circuit includes a reference voltage generator for providing a threshold voltage, a comparator for converting an input signal into a rectangular signal, a flip-flop, a pattern-counter part for counting a signal from the flip-flop and a control part for setting the threshold voltage in the comparator. The automatic pattern synchronizing circuit automatically synchronizes voltage patterns. In particular, the high and low voltage levels of the input waveform are automatically measured and the optimum threshold voltage is automatically set.

摘要翻译： 自动图案同步电路对时钟之间的相位差进行重新计时，从而调整来自被测器件的测试图案输出。 自动图案同步电路包括用于提供阈值电压的参考电压发生器，用于将输入信号转换为矩形信号的比较器，触发器，用于对来自触发器的信号进行计数的图形计数器部分和控制 用于设置比较器中的阈值电压的部分。 自动模式同步电路自动同步电压模式。 特别地，自动测量输入波形的高低电压电平，并自动设置最佳阈值电压。