公开(公告)号：US20230207665A1

公开(公告)日：2023-06-29

申请号：US18178660

申请日：2023-03-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Teng Liao ,  Chia-Cheng Tai ,  Tzu-Chan Weng ,  Yi-Wei Chiu ,  Chih Hsuan Cheng

IPC: H01L29/66 ,  H01L21/3213 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/423

CPC classification number: H01L29/66545 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/823431 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/42316 ,  H01L29/66795

Abstract: A method includes forming a semiconductor fin extending a first height above a substrate, forming a dummy dielectric material over the semiconductor fin and over the substrate, forming a dummy gate material over the dummy dielectric material, the dummy gate material extending a second height above the substrate, etching the dummy gate material using multiple etching processes to form a dummy gate stack, wherein each etching process of the multiple etching processes is a different etching process, wherein the dummy gate stack has a first width at the first height, and wherein the dummy gate stack has a second width at the second height that is different from the first width.

公开(公告)号：US20230009031A1

公开(公告)日：2023-01-12

申请号：US17648836

申请日：2022-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jui Fu Hsieh ,  Chia-Chi Yu ,  Chih-Teng Liao ,  Yi-Jen Chen ,  Chia-Cheng Tai

IPC: H01L21/66 ,  H01L21/311

Abstract: A method includes determining a target etching depth for etching a plurality of dielectric regions in a wafer. The wafer includes a plurality of protruding semiconductor fins and the plurality of dielectric regions between the plurality of protruding semiconductor fins. The method further includes etching the plurality of dielectric regions, projecting a light beam on the wafer, and generating a spectrum from a reflected light reflected from the wafer, determining an end point for etching based on the spectrum. The end point is an expected time point. The plurality of dielectric regions are etched to the target etching depth. The etching of the plurality of dielectric regions is stopped at the end point.

公开(公告)号：US20240379470A1

公开(公告)日：2024-11-14

申请号：US18782419

申请日：2024-07-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jui Fu Hsieh ,  Chia-Chi Yu ,  Chih-Teng Liao ,  Yi-Jen Chen ,  Chia-Cheng Tai

IPC: H01L21/66 ,  H01L21/311

Abstract: A method includes determining a target etching depth for etching a plurality of dielectric regions in a wafer. The wafer includes a plurality of protruding semiconductor fins and the plurality of dielectric regions between the plurality of protruding semiconductor fins. The method further includes etching the plurality of dielectric regions, projecting a light beam on the wafer, and generating a spectrum from a reflected light reflected from the wafer, determining an end point for etching based on the spectrum. The end point is an expected time point. The plurality of dielectric regions are etched to the target etching depth. The etching of the plurality of dielectric regions is stopped at the end point.

公开(公告)号：US12300741B2

公开(公告)日：2025-05-13

申请号：US18178660

申请日：2023-03-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Teng Liao ,  Chia-Cheng Tai ,  Tzu-Chan Weng ,  Yi-Wei Chiu ,  Chih Hsuan Cheng

IPC: H01L29/66 ,  H01L21/3213 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/78

Abstract: A method includes forming a semiconductor fin extending a first height above a substrate, forming a dummy dielectric material over the semiconductor fin and over the substrate, forming a dummy gate material over the dummy dielectric material, the dummy gate material extending a second height above the substrate, etching the dummy gate material using multiple etching processes to form a dummy gate stack, wherein each etching process of the multiple etching processes is a different etching process, wherein the dummy gate stack has a first width at the first height, and wherein the dummy gate stack has a second width at the second height that is different from the first width.

公开(公告)号：US12165936B2

公开(公告)日：2024-12-10

申请号：US17648836

申请日：2022-01-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jui Fu Hsieh ,  Chia-Chi Yu ,  Chih-Teng Liao ,  Yi-Jen Chen ,  Chia-Cheng Tai

IPC: H01L21/66 ,  H01L21/311

Abstract: A method includes determining a target etching depth for etching a plurality of dielectric regions in a wafer. The wafer includes a plurality of protruding semiconductor fins and the plurality of dielectric regions between the plurality of protruding semiconductor fins. The method further includes etching the plurality of dielectric regions, projecting a light beam on the wafer, and generating a spectrum from a reflected light reflected from the wafer, determining an end point for etching based on the spectrum. The end point is an expected time point. The plurality of dielectric regions are etched to the target etching depth. The etching of the plurality of dielectric regions is stopped at the end point.