公开(公告)号：US20240363452A1

公开(公告)日：2024-10-31

申请号：US18767153

申请日：2024-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Hau Shiu ,  Ching-Yu Chang ,  Jei Ming Chen ,  Jr-Yu Chen ,  Tze-Liang Lee

IPC: H01L21/66 ,  H01L21/02

CPC classification number: H01L22/12 ,  H01L21/02186 ,  H01L21/0228

Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.

公开(公告)号：US11271083B2

公开(公告)日：2022-03-08

申请号：US16805862

申请日：2020-03-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Hsien Cheng ,  Jr-Hung Li ,  Tai-Chun Huang ,  Tze-Liang Lee ,  Chung-Ting Ko ,  Jr-Yu Chen ,  Wan-Chen Hsieh

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L29/08

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

公开(公告)号：US12087644B2

公开(公告)日：2024-09-10

申请号：US17493209

申请日：2021-10-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Hau Shiu ,  Ching-Yu Chang ,  Jei Ming Chen ,  Jr-Yu Chen ,  Tze-Liang Lee

IPC: H01L21/02 ,  H01L21/66

CPC classification number: H01L22/12 ,  H01L21/02186 ,  H01L21/0228

Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.

公开(公告)号：US20210098584A1

公开(公告)日：2021-04-01

申请号：US16805862

申请日：2020-03-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Hsien Cheng ,  Jr-Hung Li ,  Tai-Chun Huang ,  Tze-Liang Lee ,  Chung-Ting Ko ,  Jr-Yu Chen ,  Wan-Chen Hsieh

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

公开(公告)号：US20220367293A1

公开(公告)日：2022-11-17

申请号：US17493209

申请日：2021-10-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Hau Shiu ,  Ching-Yu Chang ,  Jei Ming Chen ,  Jr-Yu Chen ,  Tze-Liang Lee

IPC: H01L21/66 ,  H01L21/02

Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.