公开(公告)号：US20230387230A1

公开(公告)日：2023-11-30

申请号：US18446567

申请日：2023-08-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ching-Hwanq Su ,  Pohan Kung ,  Ying Hsin Lu ,  I-Shan Huang

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L29/49

CPC classification number: H01L29/42372 ,  H01L29/401 ,  H01L29/7851 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/42376 ,  H01L29/4958

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

公开(公告)号：US20220216317A1

公开(公告)日：2022-07-07

申请号：US17700172

申请日：2022-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ching-Hwanq Su ,  Pohan Kung ,  Ying Hsin Lu ,  I-Shan Huang

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/78 ,  H01L29/66

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

公开(公告)号：US11961891B2

公开(公告)日：2024-04-16

申请号：US17700172

申请日：2022-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ching-Hwanq Su ,  Pohan Kung ,  Ying Hsin Lu ,  I-Shan Huang

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/42372 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4958 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

公开(公告)号：US11282934B2

公开(公告)日：2022-03-22

申请号：US16692571

申请日：2019-11-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ching-Hwanq Su ,  Pohan Kung ,  Ying Hsin Lu ,  I-Shan Huang

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/78 ,  H01L29/66

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

公开(公告)号：US20210028290A1

公开(公告)日：2021-01-28

申请号：US16692571

申请日：2019-11-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ru-Shang Hsiao ,  Ching-Hwanq Su ,  Pohan Kung ,  Ying Hsin Lu ,  I-Shan Huang

IPC: H01L29/423 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a channel component of a transistor and a gate component disposed over the channel component. The gate component includes: a dielectric layer, a first work function metal layer disposed over the dielectric layer, a fill-metal layer disposed over the first work function metal layer, and a second work function metal layer disposed over the fill-metal layer.

公开(公告)号：US10515807B1

公开(公告)日：2019-12-24

申请号：US16008321

申请日：2018-06-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jui-Fen Chien ,  Chih-Hsiang Fan ,  Hsiao-Kuan Wei ,  Pohan Kung ,  Hsien-Ming Lee

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/66 ,  H01L21/321 ,  H01L29/06

Abstract: Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.