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1.发明申请公开(公告)号：US20100196017A1
公开(公告)日：2010-08-05
申请号：US12697202
申请日：2010-01-29
CPC分类号： H04B10/6971 , H04B10/25133 , H04B10/616 , H04B10/6161 , H04B2210/252
摘要： A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.
摘要翻译： 通过数字信号处理补偿接收的光信号的波形中的失真的失真补偿装置包括多个固定量补偿器，其补偿各个给定补偿量处的波形失真。 通过多个固定量补偿器中的每一个的开/关切换来改变多个固定量补偿器的操作状态的组合，并且多个固定量补偿器被级联。
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2.发明授权公开(公告)号：US08447190B2
公开(公告)日：2013-05-21
申请号：US12697202
申请日：2010-01-29
CPC分类号： H04B10/6971 , H04B10/25133 , H04B10/616 , H04B10/6161 , H04B2210/252
摘要： A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.
摘要翻译： 通过数字信号处理补偿接收的光信号的波形中的失真的失真补偿装置包括多个固定量补偿器，其补偿各个给定补偿量处的波形失真。 通过多个固定量补偿器中的每一个的开/关切换来改变多个固定量补偿器的操作状态的组合，并且多个固定量补偿器被级联。
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公开(公告)号：US08553825B2
公开(公告)日：2013-10-08
申请号：US12708859
申请日：2010-02-19
申请人： Kiichi Sugitani , Kazunari Shiota , Yuji Ishii , Hisao Nakashima
发明人： Kiichi Sugitani , Kazunari Shiota , Yuji Ishii , Hisao Nakashima
IPC分类号： H04L7/00
CPC分类号： H04B10/61
摘要： A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.
摘要翻译： 相位同步方法使用去除包含在输入信号中的误差分量的去除路径和用于增加与去除去除路径中的误差分量所花费的处理时间相对应的延迟的延迟相加路径。 去除路径包括平均部分。 平均部分包括移位寄存器和获取单元。 移位寄存器存储与要平均的数据的最大数量一样多的数据，并且连续地接收在删除路径中从其中提取了错误分量的处理数据。 获取单元从输入到移位寄存器的连续处理数据中，从移位寄存器中的中心附近的位置到两端的位置获得与要平均化的数据数量相同的处理数据。
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公开(公告)号：US20100239269A1
公开(公告)日：2010-09-23
申请号：US12708859
申请日：2010-02-19
申请人： Kiichi SUGITANI , Kazunari Shiota , Yuji Ishii , Hisao Nakashima
发明人： Kiichi SUGITANI , Kazunari Shiota , Yuji Ishii , Hisao Nakashima
CPC分类号： H04B10/61
摘要： A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.
摘要翻译： 相位同步方法使用去除包含在输入信号中的误差分量的去除路径和用于增加与去除去除路径中的误差分量所花费的处理时间相对应的延迟的延迟相加路径。 去除路径包括平均部分。 平均部分包括移位寄存器和获取单元。 移位寄存器存储与要平均的数据的最大数量一样多的数据，并且连续地接收在删除路径中从其中提取了错误分量的处理数据。 获取单元从输入到移位寄存器的连续处理数据中，从移位寄存器中的中心附近的位置到两端的位置获得与要平均化的数据数量相同的处理数据。
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公开(公告)号：US07577098B2
公开(公告)日：2009-08-18
申请号：US11189400
申请日：2005-07-26
IPC分类号： H04J3/14
CPC分类号： H04L43/0811 , H04L41/046 , H04L43/0823 , H04L43/16
摘要： A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.
摘要翻译： 监视网络状态的网络监视装置包括接收通过网络的分组的接收单元; 处理单元，其执行关于所接收的分组的网络状态的分析; 以及确定单元，其基于由所述处理单元获得的结果来确定网络中是否发生故障。
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公开(公告)号：US20060209699A1
公开(公告)日：2006-09-21
申请号：US11189400
申请日：2005-07-26
IPC分类号： G01R31/08
CPC分类号： H04L43/0811 , H04L41/046 , H04L43/0823 , H04L43/16
摘要： A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.
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7.发明授权Multiplexing method and apparatus suitable for transmission of overhead data arriving from many communication lines 有权适用于从许多通信线路到达的开销数据的传输的多路复用方法和装置公开(公告)号：US07106761B2
公开(公告)日：2006-09-12
申请号：US10075853
申请日：2002-02-13
IPC分类号： H04J3/02
CPC分类号： H04J3/062 , H04J3/047 , H04J3/0685
摘要： Data arriving from a plurality of channels asynchronously to each other are respectively stored in separate FIFOs (10). A controller (12) monitors the status of the FIFOs (10), retrieves the stored data in a predetermined order, and multiplexes the data, together with timing data indicating the presence or absence of the data, into a serial signal having a frame structure in which time slots are fixedly assigned to the respective channels. On the serial data, the same value appears successively as data, and when the data is valid, the corresponding timing data changes from a 0 to a 1. When the data is invalid, the value of the corresponding timing data does not change.
摘要翻译： 从多个通道彼此异步到达的数据分别存储在单独的FIFO（10）中。 控制器（12）监视FIFO（10）的状态，以预定顺序检索存储的数据，并将数据与表示数据存在或不存在的定时数据一起复用到具有帧结构的串行信号 其中时隙被固定地分配给相应的信道。 在串行数据上，相同的值作为数据连续出现，当数据有效时，相应的定时数据从0变为1.当数据无效时，对应的定时数据的值不变。
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公开(公告)号：US06785224B2
公开(公告)日：2004-08-31
申请号：US09748672
申请日：2000-12-26
申请人： Kumiko Uematsu , Hiroshi Kanzawa , Takashi Honda , Junichi Moriyama , Kazunari Shiota , Hidetoshi Kawamura , Isao Takata , Yukie Yoshihara , Kanji Naito
发明人： Kumiko Uematsu , Hiroshi Kanzawa , Takashi Honda , Junichi Moriyama , Kazunari Shiota , Hidetoshi Kawamura , Isao Takata , Yukie Yoshihara , Kanji Naito
IPC分类号： H04L1228
CPC分类号： H04L41/0853 , H04L12/43 , H04L41/0803 , H04L45/02
摘要： A ring configuring method configures a network in which a plurality of nodes are connected linearly, and performs topology construction for the ring by circulating topology data through the respective nodes and collecting connection information of the respective nodes. The method includes the steps of providing in the topology data a flag indicating whether the connection information is collected in each node; inverting the flag at a terminal station which is an end node of the open ring, and turning the topology data there; causing the topology data to passing through a node other than any terminal station as it is; and adding the connection information to the topology data in each node according to the flag, and performing topology construction.
摘要翻译： 环配置方法配置多个节点线性连接的网络，并通过遍历相应节点的拓扑数据循环并收集各个节点的连接信息，对环进行拓扑结构。 该方法包括以下步骤：在拓扑数据中提供指示连接信息是否被收集在每个节点中的标志; 在作为开环的端节点的终端站处反转标志，并在其上转动拓扑数据; 导致拓扑数据原样通过除终端之外的节点; 并根据该标志将连接信息添加到每个节点的拓扑数据，并执行拓扑结构。
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