摘要:
A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.
摘要:
A ring configuring method configures a network in which a plurality of nodes are connected linearly, and performs topology construction for the ring by circulating topology data through the respective nodes and collecting connection information of the respective nodes. The method includes the steps of providing in the topology data a flag indicating whether the connection information is collected in each node; inverting the flag at a terminal station which is an end node of the open ring, and turning the topology data there; causing the topology data to passing through a node other than any terminal station as it is; and adding the connection information to the topology data in each node according to the flag, and performing topology construction.
摘要:
A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.
摘要:
A distortion compensating apparatus which compensates for distortion in a waveform of a received light signal through a digital signal processing includes a plurality of fixed amount compensators which compensate for the distortion in the waveform at respective given compensating amounts. The combination of operating states of the plurality of fixed amount compensators is changed by on/off switching of each of the plurality of fixed amount compensators, and the plurality of fixed amount compensators are cascaded.
摘要:
A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.
摘要:
A network monitoring device that monitors a network state, includes a receiving unit that receives a packet passing through the network; a processing unit that performs analysis of the network state with respect to the packet received; and a determining unit that determines whether a failure has occurred in the network, based on the result obtained by the processing unit.
摘要:
A phase synchronization method uses a removal path for removing an error component contained in an input signal and a delay addition path for adding a delay corresponding to a processing time period taken to remove the error component in the removal path. The removal path includes an averaging section. The averaging section includes a shift register and an obtaining unit. The shift register stores as many data as the maximum number of data to be averaged and successively receives processing data from which the error component has been extracted in the removal path. The obtaining unit obtains, among the successive processing data input to the shift register, as many processing data as the number of data to be averaged from a position near the center toward both ends in the shift register.
摘要:
Data arriving from a plurality of channels asynchronously to each other are respectively stored in separate FIFOs (10). A controller (12) monitors the status of the FIFOs (10), retrieves the stored data in a predetermined order, and multiplexes the data, together with timing data indicating the presence or absence of the data, into a serial signal having a frame structure in which time slots are fixedly assigned to the respective channels. On the serial data, the same value appears successively as data, and when the data is valid, the corresponding timing data changes from a 0 to a 1. When the data is invalid, the value of the corresponding timing data does not change.