公开(公告)号：US20240313751A1

公开(公告)日：2024-09-19

申请号：US18589715

申请日：2024-02-28

Applicant: Texas Instruments Incorporated

Inventor： Sachin AITHAL ,  Anand H UDUPA ,  Raja Reddy PATUKURI ,  Sandeep OSWAL ,  Aatish CHANDAK ,  Vignesh SUBRAMANYA ,  Aravind MIRIYALA

IPC: H03K5/1252 ,  A61B5/00 ,  A61B5/349 ,  H03M1/12

CPC classification number: H03K5/1252 ,  A61B5/349 ,  A61B5/7217 ,  H03M1/12

Abstract: A circuit includes an interference frequency tracking circuit, a PLI synthesizer circuit, and a summing circuit. The interference frequency tracking circuit is configured to track a frequency of an interference signal derived from a target signal, and provide a frequency selection value representing the frequency of the interference signal. The PLI synthesizer circuit is configured to generate, based on the frequency selection value, a correction signal at the frequency of the interference signal, adjust a phase of the correction signal to match a phase of the interference signal in the target signal, and adjust an amplitude of the correction signal to match an amplitude of the interference signal in the target signal. The summing circuit is configured to subtract the correction signal from the target signal.

公开(公告)号：US20200212954A1

公开(公告)日：2020-07-02

申请号：US16234672

申请日：2018-12-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aravind MIRIYALA ,  Ravikumar PATTIPAKA ,  Raja Sekhar KANAKAMEDALA ,  Sandeep Kesrimal OSWAL

IPC: H04B1/44 ,  B06B1/02 ,  H04B11/00

Abstract: An ultrasound system includes a transmit-receive switch. The transmit-receive switch includes a combined transmit-receive and return-to-zero (RTZ) path. The combined transmit-receive and RTZ path includes a transistor with a first current terminal, a second current terminal, and a control terminal. The second current terminal of the transistor is coupled to a ground node via a first switch and is coupled to a receive node via a second switch. The ultrasound system also includes a receiver front-end circuit coupled to the receive node.

公开(公告)号：US20240223164A1

公开(公告)日：2024-07-04

申请号：US18496465

申请日：2023-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ketan SHARMA ,  Ravikumar PATTIPAKA ,  Vajeed NIMRAN ,  Aravind MIRIYALA ,  Shabbir AMJHERA WALA ,  Savyan KANISSERRY

IPC: H03K3/021 ,  H03K3/3568

CPC classification number: H03K3/021 ,  H03K3/3568

Abstract: In some examples, a pulser circuit is configured to provide a pulse signal in a first operational state, pre-charge components of the pulser circuit via a first signal path in a second operational state following the first operational state, wherein the first signal path includes first components having a first voltage tolerance and second components having a second voltage tolerance, the first voltage tolerance being less than the second voltage tolerance, and discharge a voltage of the pulser circuit to ground in a third operational state between the first operational state and the second operational state, and following the second operational state.

公开(公告)号：US20240120962A1

公开(公告)日：2024-04-11

申请号：US18543305

申请日：2023-12-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aravind MIRIYALA ,  Ravikumar PATTIPAKA ,  Raja Sekhar KANAKAMEDALA ,  Sandeep Kesrimal OSWAL

IPC: H04B1/44 ,  B06B1/02 ,  H03K17/00 ,  H04B11/00

CPC classification number: H04B1/44 ,  B06B1/023 ,  H03K17/00 ,  H03K17/002 ,  H04B11/00 ,  A61B8/54

Abstract: An ultrasound system includes a transmit-receive switch. The transmit-receive switch includes a combined transmit-receive and return-to-zero (RTZ) path. The combined transmit-receive and RTZ path includes a transistor with a first current terminal, a second current terminal, and a control terminal. The second current terminal of the transistor is coupled to a ground node via a first switch and is coupled to a receive node via a second switch. The ultrasound system also includes a receiver front-end circuit coupled to the receive node.

公开(公告)号：US20190009301A1

公开(公告)日：2019-01-10

申请号：US15852018

申请日：2017-12-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Aravind MIRIYALA ,  Naveen Kumar GINIGE ,  Vajeed NIMRAN ,  Saugata DATTA ,  Shabbir AMJHERA WALA

IPC: B06B1/02 ,  H03K17/687 ,  A61B8/00

CPC classification number: B06B1/0215 ,  A61B8/4483 ,  B06B2201/76 ,  H03K17/6871 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: A semiconductor device includes a trim storage and an encoder. The trim storage stores trim values. The encoder determines a magnitude of a supply voltage, determines a magnitude of a handle voltage, determines a source-to-handle voltage of a first transistor, and determines a source-to-handle voltage of a second transistor. Further, the encoder determines a target number of selectable first transistor units comprising the first transistor to select for the first transistor. Based on a trim value from the trim storage, the source-to-handle voltage of the first transistor and the source-to-handle voltage of the second transistor, the encoder determines a target number of selectable second transistor units comprising the second transistor to select for the second transistor. The encoder asserts control signals to select the target number of selectable first transistor units and the target number of selectable second transistor units.