公开(公告)号：US20240155843A1

公开(公告)日：2024-05-09

申请号：US17994401

申请日：2022-11-28

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wang Xiang ,  CHIA CHING HSU ,  Shen-De Wang ,  Yung-Lin Tseng ,  WEICHANG LIU

IPC: H10B43/35 ,  H10B41/23 ,  H10B41/35 ,  H10B43/23

CPC classification number: H01L27/1157 ,  H01L27/11524 ,  H01L27/11553 ,  H01L27/1158

Abstract: A semiconductor device includes a substrate having a flash memory region and a logic device region, a logic transistor disposed in the logic device region, and a flash memory transistor disposed in the flash memory region. The flash memory transistor includes a metal select gate having two opposite sidewalls and two memory gates disposed on the two opposite sidewalls of the metal select gate.

公开(公告)号：US20240315017A1

公开(公告)日：2024-09-19

申请号：US18135712

申请日：2023-04-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： WEICHANG LIU ,  Wang Xiang ,  CHIA CHING HSU ,  Yung-Lin Tseng ,  Shen-De Wang

IPC: H10B41/30 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66 ,  H01L29/788

CPC classification number: H10B41/30 ,  H01L28/20 ,  H01L29/40114 ,  H01L29/42328 ,  H01L29/66825 ,  H01L29/7881

Abstract: A resistor between dummy flash structures includes a substrate. The substrate includes a resistor region and a flash region. A first dummy memory gate structure and a second dummy memory gate structure are disposed within the resistor region of the substrate. A polysilicon resistor is disposed between the first dummy memory gate structure and the second dummy memory gate structure. The polysilicon resistor contacts the first dummy memory gate structure and the second dummy memory gate structure.