公开(公告)号：US20170200729A1

公开(公告)日：2017-07-13

申请号：US14993101

申请日：2016-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tseng-Fang Dai ,  Ping-Chia Shih ,  Chi-Cheng Huang ,  Kun-I Chou ,  Hung-Wei Lin ,  Ching-Wen Yang

IPC: H01L27/115 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/518 ,  H01L27/11582 ,  H01L28/00 ,  H01L29/513 ,  H01L29/66545

Abstract: An integrated circuit process includes the following steps. A substrate including a flash cell area and a logic area is provided. A first sacrificial gate on the substrate of the flash cell area and a second sacrificial gate on the substrate of the logic area are formed, and a dielectric layer covers the substrate beside the first sacrificial gate and the second sacrificial gate. The first sacrificial gate is removed to forma first recess in the dielectric layer. An oxide/nitride/oxide layer is formed to conformally cover surfaces of the first recess. An integrated circuit formed by said integrated circuit process is also provided.