公开(公告)号：US09929056B1

公开(公告)日：2018-03-27

申请号：US15359389

申请日：2016-11-22

Applicant: United Microelectronics Corp.

Inventor： Te-Chiu Tsai ,  Shih-Yin Hsiao ,  Ching-Wei Teng ,  Tun-Jen Cheng ,  Hung-Yi Tsai ,  Shan-Shi Huang

IPC: H01L21/3205 ,  H01L21/8234 ,  H01L21/28 ,  H01L21/02 ,  H01L21/027

CPC classification number: H01L21/823462 ,  H01L21/32 ,  H01L21/823456

Abstract: A method for forming gate structures for a HV device and a MV device is provided. The method includes forming a HV oxide layer on the substrate, covering a first region predetermined for forming the HV device. Further in the method, a dielectric mask is formed on a central portion of the HV oxide layer. A thermal oxidation process is performed to form a MV oxide layer on the substrate at a second region predetermined for forming the MV device, wherein peripheral portions of the HV oxide layer not covered by the dielectric mask grow thicker. The dielectric mask is removed. A conductive layer is formed over the substrate. The conductive layer, the HV oxide layer, the MV oxide layer are patterned to form the gate structures.