公开(公告)号：US20200251435A1

公开(公告)日：2020-08-06

申请号：US16264696

申请日：2019-02-01

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu ,  Yen-Jui Chu

IPC: H01L23/00

Abstract: Provided is a circuit structure including a substrate, a pad, a dielectric layer, a conductive layer, an adhesion layer, and a conductive bump. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The conductive layer contacts the pad and extends from the pad to cover a top surface of the dielectric layer. The adhesion layer is disposed between the dielectric layer and the conductive layer. The conductive bump extends in an upward manner from a top surface of the conductive layer. The conductive bump and the conductive layer are integrally formed. A method of manufacturing the circuit structure is also provided.

公开(公告)号：US11658138B2

公开(公告)日：2023-05-23

申请号：US17679122

申请日：2022-02-24

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/05017

Abstract: Provided is a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. A method of manufacturing the semiconductor is also provided.

公开(公告)号：US20220059483A1

公开(公告)日：2022-02-24

申请号：US16996826

申请日：2020-08-18

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu

IPC: H01L23/00

Abstract: A conductive pillar bump includes a first conductive portion and a second conductive portion. The second conductive portion is located on the first conductive portion. A sidewall of the second conductive portion has at least one trench. The trench extends from a top portion of the second conductive portion to a bottom portion of the second conductive portion. The trench exposes a portion of a top surface of the first conductive portion.

公开(公告)号：US20200251434A1

公开(公告)日：2020-08-06

申请号：US16264684

申请日：2019-02-01

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu ,  Hsin-Hung Chou ,  Chun-Hung Lin

IPC: H01L23/00

Abstract: Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.

公开(公告)号：US11970388B2

公开(公告)日：2024-04-30

申请号：US17550607

申请日：2021-12-14

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu

IPC: B81B3/00 ,  B81C3/00

CPC classification number: B81B3/0018 ,  B81C3/001 ,  B81B2201/0214 ,  B81B2201/03 ,  B81B2203/033 ,  B81B2207/09

Abstract: A package structure and its manufacturing method are provided. The package structure includes a substrate with a recess, and a first MEMS chip, a first intermediate chip, a second MEMS chip and a first capping plate sequentially formed on the substrate. The lower surface of the first MEMS chip has a first sensor or a microactuator. The upper surface of the second MEMS chip has a second sensor or a microactuator. The first intermediate chip has a through-substrate via, and includes a signal conversion unit, a logic operation unit, a control unit, or a combination thereof. The package structure includes at least one of the first sensor and the second sensor.

公开(公告)号：US11145627B2

公开(公告)日：2021-10-12

申请号：US16592796

申请日：2019-10-04

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu

IPC: H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H01L23/48 ,  H01L23/00

Abstract: Provided is a semiconductor package including first to third semiconductor dies, first to third RDL layers, conductive vias and an encapsulant, and a manufacturing method thereof. The first RDL layer is on an active surface of the first semiconductor die. The second semiconductor die is on the first RDL layer and electrically connected thereto through first TSVs. The conductive vias are on the first RDL layer and around the second semiconductor die. The encapsulant encapsulates the second semiconductor die and the conductive vias. The second RDL layer is on the encapsulant. The third semiconductor die is on the second RDL layer and electrically connected thereto through second TSVs. The third RDL layer is on the third semiconductor die. The area of the second semiconductor die is smaller than that of the first semiconductor die. The area of the third semiconductor die is larger than that of the second semiconductor die.

公开(公告)号：US11063010B2

公开(公告)日：2021-07-13

申请号：US16264684

申请日：2019-02-01

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu ,  Hsin-Hung Chou ,  Chun-Hung Lin

IPC: H01L23/00

Abstract: Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.

公开(公告)号：US12215018B2

公开(公告)日：2025-02-04

申请号：US18609571

申请日：2024-03-19

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu

IPC: B81C3/00 ,  B81B3/00

Abstract: A method for manufacturing package structure is provided, including: providing a substrate having recesses; forming first MEMS chips on the substrate, each with a through-substrate via, and a first sensor or microactuator on the lower surface, located in one of the recesses; forming first intermediate chips on the substrate, each respectively on one of the first MEMS chips, having a through-substrate via, and including a signal conversion unit, a logic operation unit, control unit, or a combination thereof; forming second MEMS chips on the first intermediate chips, each with a through-substrate via, having a second sensor or microactuator on its upper surface, wherein the package structure includes at least one of the first sensor and the second sensor; and forming first capping plates on the second MEMS chips, each providing a receiving space for the second sensor or microactuator on the upper surface of each second MEMS chip.

公开(公告)号：US11610857B2

公开(公告)日：2023-03-21

申请号：US17469868

申请日：2021-09-08

Applicant: Winbond Electronics Corp.

Inventor： Jin-Neng Wu ,  Yen-Jui Chu

IPC: H01L23/00

Abstract: Provided is a circuit structure including a substrate, a pad, a dielectric layer, a conductive layer, an adhesion layer, and a conductive bump. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The conductive layer contacts the pad and extends from the pad to cover a top surface of the dielectric layer. The adhesion layer is disposed between the dielectric layer and the conductive layer. The conductive bump extends in an upward manner from a top surface of the conductive layer. The conductive bump and the conductive layer are integrally formed. A method of manufacturing the circuit structure is also provided.

公开(公告)号：US20220181282A1

公开(公告)日：2022-06-09

申请号：US17679122

申请日：2022-02-24

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu

IPC: H01L23/00

Abstract: Provided is a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. A method of manufacturing the semiconductor is also provided.