公开(公告)号：US20250006562A1

公开(公告)日：2025-01-02

申请号：US18754181

申请日：2024-06-26

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung Lin ,  Hsin-Hung Chou ,  Kao-Tsair Tsai

IPC: H01L21/66 ,  G01R31/28 ,  G03F7/00

Abstract: A layout optimization method and a semiconductor wafer are provided. The method includes: generating adjusted patterns corresponding to a first layout pattern; generating a layout optimization test group according to the adjusted patterns, wherein the layout optimization test group includes first and second clusters of test pattern arrays, the first cluster include first test pattern arrays in accordance with one of the adjusted patterns and different from one another in terms of capacity, and the second cluster include second test pattern arrays in accordance with another one of the adjusted patterns and different from one another in terms of capacity; forming the layout optimization test group on a wafer; performing an electrical inspection on the first and second pattern arrays, and determining a best manufacturing solution from the adjusted patterns according to the electrical inspection.

公开(公告)号：US11322438B2

公开(公告)日：2022-05-03

申请号：US17015012

申请日：2020-09-08

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Hsin-Hung Chou ,  Chun-Hung Lin

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/13 ,  H01L21/56 ,  H01L23/31

Abstract: A package structure including a lead frame structure, a die, an adhesive layer, and at least one three-dimensional (3D) printing conductive wire is provided. The lead frame structure includes a carrier and a lead frame. The carrier has a recess. The lead frame is disposed on the carrier. The die is disposed in the recess. The die includes at least one pad. The adhesive layer is disposed between a bottom surface of the die and the carrier and between a sidewall of the die and the carrier. The 3D printing conductive wire is disposed on the lead frame, the adhesive layer, and the pad, and is electrically connected between the lead frame and the pad.

公开(公告)号：US20220077051A1

公开(公告)日：2022-03-10

申请号：US17015012

申请日：2020-09-08

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Hsin-Hung Chou ,  Chun-Hung Lin

IPC: H01L23/498 ,  H01L23/13 ,  H01L23/00

Abstract: A package structure including a lead frame structure, a die, an adhesive layer, and at least one three-dimensional (3D) printing conductive wire is provided. The lead frame structure includes a carrier and a lead frame. The carrier has a recess. The lead frame is disposed on the carrier. The die is disposed in the recess. The die includes at least one pad. The adhesive layer is disposed between a bottom surface of the die and the carrier and between a sidewall of the die and the carrier. The 3D printing conductive wire is disposed on the lead frame, the adhesive layer, and the pad, and is electrically connected between the lead frame and the pad.

公开(公告)号：US20200251434A1

公开(公告)日：2020-08-06

申请号：US16264684

申请日：2019-02-01

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu ,  Hsin-Hung Chou ,  Chun-Hung Lin

IPC: H01L23/00

Abstract: Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.

公开(公告)号：US12119261B2

公开(公告)日：2024-10-15

申请号：US17712461

申请日：2022-04-04

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung Lin ,  Kao-Tsair Tsai ,  Chung-Hsien Liu ,  Tz-Hau Guo ,  Yen-Jui Chu

IPC: H01L21/768 ,  H01L21/8234

CPC classification number: H01L21/76897 ,  H01L21/76816 ,  H01L21/76834 ,  H01L21/823475

Abstract: A manufacturing method for a semiconductor structure is provided. First active areas, a second active area, and a third active area are formed. A first dielectric layer is formed on the active areas. A patterned region that includes a cavity region and a dielectric region is formed in the first dielectric layer, and the cavity region surrounds the dielectric region. A filling layer is formed in the cavity region. Multiple first contact holes and at least one second contact hole that penetrate the first dielectric layer are formed. Each first contact hole exposes a portion of the corresponding first active area, and the second contact hole replaces the dielectric region and exposes a portion of the second active area. Metal layers are filled in to the first contact holes and the second contact hole.

公开(公告)号：US20200161264A1

公开(公告)日：2020-05-21

申请号：US16546293

申请日：2019-08-20

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung Lin ,  Yen-Jui Chu ,  Kao-Tsair Tsai

IPC: H01L23/00

Abstract: A semiconductor device is provided and includes a first pad and a second pad, a first conductive connector and a second conductive connector, a first conductive structure and a second conductive structure. The first conductive connector and the second conductive connector are disposed over the first pad and the second pad. The first conductive structure is electrically connected to the first pad and the first conductive connector, and includes a first portion, a second portion and a connecting portion connecting the first and second portions. The first portion and the second portion are not overlapped in a vertical direction, and the first portion, the connecting portion and the second portion are integrally formed. The second conductive structure is electrically connected to the second pad and the second conductive connector, wherein a portion of the second conductive structure is overlapped with the first conductive structure therebeneath in the vertical direction.

公开(公告)号：US11818884B2

公开(公告)日：2023-11-14

申请号：US17545519

申请日：2021-12-08

Applicant: Winbond Electronics Corp.

Inventor： Chien-Hsien Wu ,  Chun-Hung Lin ,  Kao-Tsair Tsai ,  Yao-Ting Tsai

IPC: H01L21/3105 ,  H01L21/76 ,  H10B41/00 ,  H01L29/66

CPC classification number: H10B41/00 ,  H01L29/66825

Abstract: A method for manufacturing a non-volatile memory device is provided. The method includes forming a trench through a sacrificial layer and extending into a substrate, filling a first insulating material into the trench, and implanting a dopant in the first insulating material by an implantation process. Then, the first insulating material is partially removed to form a first recess between the sacrificial layers. The lowest point of the first recess is lower than the top surface of the substrate. The method includes filling a second insulating material in the first recess and removing the sacrificial layer to form a second recess adjacent to the second insulating material. The method includes forming a first polycrystalline silicon layer in the second recess, and sequentially forming a dielectric layer and a second polycrystalline silicon layer on the first polycrystalline silicon layer.

公开(公告)号：US20200350268A1

公开(公告)日：2020-11-05

申请号：US16398278

申请日：2019-04-30

Applicant: Winbond Electronics Corp.

Inventor： Yen-Jui Chu ,  Jin-Neng Wu ,  Chun-Hung Lin ,  Hsin-Hung Chou

IPC: H01L23/00

Abstract: A wire bonding structure and a method of manufacturing the same are provided. The wire bonding structure includes a bonding pad structure, a protection layer and a bonding wire. The bonding pad structure includes a bonding pad and a conductive layer. The bonding pad has an opening. The conductive layer is electrically connected to the bonding pad. At least a portion of the conductive layer is located in the opening of the bonding pad and laterally surrounded by the bonding pad. The protection layer at least covers a portion of a surface of the bonding pad structure. The bonding wire is bonded to the conductive layer of the bonding pad structure.

公开(公告)号：US10658320B1

公开(公告)日：2020-05-19

申请号：US16546293

申请日：2019-08-20

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung Lin ,  Yen-Jui Chu ,  Kao-Tsair Tsai

IPC: H01L23/00

Abstract: A semiconductor device is provided and includes a first pad and a second pad, a first conductive connector and a second conductive connector, a first conductive structure and a second conductive structure. The first conductive connector and the second conductive connector are disposed over the first pad and the second pad. The first conductive structure is electrically connected to the first pad and the first conductive connector, and includes a first portion, a second portion and a connecting portion connecting the first and second portions. The first portion and the second portion are not overlapped in a vertical direction, and the first portion, the connecting portion and the second portion are integrally formed. The second conductive structure is electrically connected to the second pad and the second conductive connector, wherein a portion of the second conductive structure is overlapped with the first conductive structure therebeneath in the vertical direction.

公开(公告)号：US11133187B2

公开(公告)日：2021-09-28

申请号：US16046069

申请日：2018-07-26

Applicant: Winbond Electronics Corp.

Inventor： Chun-Hung Lin ,  Ching-Chun Huang ,  Chung-Chen Hsu

IPC: G03F1/68 ,  G03F1/70 ,  H01L21/027 ,  H01L21/266 ,  G03F1/00

Abstract: A method for forming a photo-mask includes providing a first pattern, wherein the first pattern includes a first light-transmitting region and a first light-shielding region; transforming the first pattern into a second pattern, wherein the second pattern includes a second light-transmitting region and a second light-shielding region, the second light-transmitting region is located within range of the first light-transmitting region, and the second light-transmitting region has an area which is smaller than that of the first light-transmitting region, the second light-shielding region includes the entire region of the first light-shielding region, and the second light-shielding region has an area which is greater than that of the first light-shielding region; and forming the second pattern on a photo-mask substrate to form a photo-mask, wherein the photo-mask is used in an ion implantation process of a material layer.