公开(公告)号：US20240291635A1

公开(公告)日：2024-08-29

申请号：US18113588

申请日：2023-02-23

Applicant: XILINX, INC.

Inventor： Abbas MORSHED ,  Ygal ARBEL ,  Balakrishna JAYADEV ,  Eun Mi KIM

IPC: H04L9/08 ,  G06F21/60

CPC classification number: H04L9/0825 ,  G06F21/602 ,  H04L9/0894

Abstract: Examples herein describe techniques for method of accessing encrypted data. The techniques include receiving, via a memory controller, a first memory request to a first memory region, where the first memory region is encrypted based on a first key, and incrementing, based on the first memory request, a first counter associated with the first key. The techniques further include, in response to determining that the first counter exceeds a first threshold, initiating a key rolling operation to cause the first memory region to be encrypted based on a second key. The techniques further include tracking an address range of the first memory region that has been encrypted based on the second key, and, in response to determining that an address of a second memory request is outside of the address range, causing the second memory request to be completed based on the first key.

公开(公告)号：US20250167152A1

公开(公告)日：2025-05-22

申请号：US19032979

申请日：2025-01-21

Applicant: XILINX, INC.

Inventor： Ygal ARBEL ,  Kenneth MA ,  Balakrishna JAYADEV ,  Sagheer AHMAD

IPC: H01L23/00 ,  G11C5/06 ,  H01L23/538 ,  H01L25/065

Abstract: Embodiments herein describe a multiple die system that includes an interposer that connects a first die to a second die. Each die has a bump interface structure that is connected to the other structure using traces in the interposer. However, the bump interface structures may have different orientations relative to each other, or one of the interface structures defines fewer signals than the other. Directly connecting the corresponding signals defined by the structures to each other may be impossible to do in the interposer, or make the interposer too costly. Instead, the embodiments here simplify routing in the interposer by connecting the signals in the bump interface structures in a way that simplifies the routing but jumbles the signals. The jumbled signals can then be corrected using reordering circuitry in the dies (e.g., in the link layer and physical layer).

公开(公告)号：US20240014161A1

公开(公告)日：2024-01-11

申请号：US18369115

申请日：2023-09-15

Applicant: XILINX, INC.

Inventor： Ygal ARBEL ,  Kenneth MA ,  Balakrishna JAYADEV ,  Sagheer AHMAD

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/538

CPC classification number: H01L24/16 ,  H01L25/0657 ,  H01L23/5384 ,  H01L2224/16225 ,  H01L2924/1434 ,  H01L2225/0651

Abstract: Embodiments herein describe a multiple die system that includes an interposer that connects a first die to a second die. Each die has a bump interface structure that is connected to the other structure using traces in the interposer. However, the bump interface structures may have different orientations relative to each other, or one of the interface structures defines fewer signals than the other. Directly connecting the corresponding signals defined by the structures to each other may be impossible to do in the interposer, or make the interposer too costly. Instead, the embodiments here simplify routing in the interposer by connecting the signals in the bump interface structures in a way that simplifies the routing but jumbles the signals. The jumbled signals can then be corrected using reordering circuitry in the dies (e.g., in the link layer and physical layer).