公开(公告)号：US10541686B1

公开(公告)日：2020-01-21

申请号：US16192053

申请日：2018-11-15

Applicant: Xilinx, Inc.

Inventor： David P. Schultz ,  David Robinson ,  Kusuma Bathala ,  Wenyi Song

IPC: H03K19/177

Abstract: A circuit for routing data in an integrated circuit device is described. The circuit comprises an input/output port; an interface circuit coupled to the input/output port and configured to receive data, the interface circuit comprising a selection circuit enabling the selection of the data and a predetermined value; and a control circuit coupled to control the selection circuit; wherein the control circuit holds the input/output port at the predetermined value during a partial reconfiguration of the integrated circuit device in response to a control signal. A method of configuring a circuit for routing data in an integrated circuit device is also described.

公开(公告)号：US09696747B1

公开(公告)日：2017-07-04

申请号：US15253566

申请日：2016-08-31

Applicant: Xilinx, Inc.

Inventor： Sing-Keng Tan ,  Wenyi Song

IPC: G05F3/16 ,  H03K17/687

CPC classification number: G05F3/16

Abstract: An example a voltage regulator includes: a bias circuit coupled to an output node; a first operational amplifier having a first input coupled to the output node, a second input coupled to a reference voltage node, and an output coupled to a first node; a second operational amplifier having a first input coupled to the output node, a second input coupled to the reference voltage node, and an output coupled to a second node; an output transistor coupled between the output node and a ground node, the output transistor including a gate; first, second, and third stacked transistor pairs each serially coupled between the output node and the ground node, each transistor of the first, second, and third stacked transistor pairs including a gate; and switch circuits configured to selectively couple: the gates of the first and second stacked transistor pairs to the second node; and the gate of the output transistor to the first node.