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公开(公告)号：US06617796B2
公开(公告)日：2003-09-09
申请号：US09867463
申请日：2001-05-31
申请人： Yasushi Sasaki , Masaki Miyatake , Hajime Sato , Takanori Tsunashima , Yasuyuki Hanazawa , Hoko Hirai
发明人： Yasushi Sasaki , Masaki Miyatake , Hajime Sato , Takanori Tsunashima , Yasuyuki Hanazawa , Hoko Hirai
IPC分类号： G09G310
CPC分类号： H02M3/073 , G09G3/3696
摘要： In a flat panel display device in which driving circuits and the like are arranged on an array substrate, a technology to realize a compact size and a low cost of an external control circuit is disclosed. At least one pumping circuit included in the external control circuit is arranged on the array substrate, and an output side capacitor connected between an output portion of the pumping circuit and the ground GND and an input side capacitor of a clock input portion are arranged outside the array substrate.
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公开(公告)号：US07019735B2
公开(公告)日：2006-03-28
申请号：US10619484
申请日：2003-07-16
申请人： Yasushi Sasaki , Masaki Miyatake , Hajime Sato , Takanori Tsunashima , Yasuyuki Hanazawa , Hoko Hirai
发明人： Yasushi Sasaki , Masaki Miyatake , Hajime Sato , Takanori Tsunashima , Yasuyuki Hanazawa , Hoko Hirai
IPC分类号： G09G3/10
CPC分类号： H02M3/073 , G09G3/3696
摘要： In a flat panel display device in which driving circuits and the like are arranged on an array substrate, a technology to realize a compact size and a low cost of an external control circuit is disclosed. At least one pumping circuit included in the external control circuit is arranged on the array substrate, and an output side capacitor connected between an output portion of the pumping circuit and the ground GND and an input side capacitor of a clock input portion are arranged outside the array substrate.
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公开(公告)号：US06771247B2
公开(公告)日：2004-08-03
申请号：US09812571
申请日：2001-03-21
IPC分类号： G09G336
CPC分类号： G09G3/3659 , G02F1/136 , G09G2300/0857 , G09G2320/10 , G09G2330/021
摘要： A display has display pixels provided with digital memories, respectively. In each display pixel, a pixel electrode and a data line are connected to each other through a first switch, and the pixel electrode and the digital memory are connected to each other through a second switch. In a first display period, the second switches are turned off and the first switches are turned on, to display video data supplied from the data lines. In a second display period, the second switches are turned on and the first switches are turned off, to stop scan and data drivers and display video data stored in the digital memories.
摘要翻译： 显示器分别具有设置有数字存储器的显示像素。 在每个显示像素中，像素电极和数据线通过第一开关彼此连接，并且像素电极和数字存储器通过第二开关相互连接。 在第一显示周期中，第二开关断开，第一开关导通，以显示从数据线提供的视频数据。 在第二显示期间，第二开关导通，第一开关断开，停止扫描和数据驱动并显示数字存储器中存储的视频数据。
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公开(公告)号：US06639575B1
公开(公告)日：2003-10-28
申请号：US09531162
申请日：2000-03-17
申请人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
发明人： Takanori Tsunashima , Yoshiro Aoki , Kazuo Nakamura , Hajime Sato
IPC分类号： G09G336
CPC分类号： G09G3/3648 , G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2330/02
摘要： There is provided a driving circuit including active matrix type liquid crystal display capable of decreasing the electric power consumption of CMOS buffers contained in a scanning line driving circuit and picture signal line driving circuit. The liquid crystal display has an active matrix type liquid crystal display elements comprising switching elements connected to a plurality of scanning lines and a plurality of picture signal lines perpendicular to the scanning lines. The liquid crystal display includes a digital circuit wherein at least one of a scanning line driving circuit for applying a scanning pulse to the switching elements via the scanning lines and a picture signal line driving circuit for applying a picture signal to the picture signal lines comprises one stage of CMOS buffer or a plurality of CMOS buffers connected in multi stages, the CMOS transistor or each of the CMOS transistors including an N-type thin-film transistor and P-type thin-film transistor which are formed on the same substrate. In the liquid crystal display, one transistor, which has a longer off-state time during operation of the circuit, of the N-type thin-film transistor and P-type thin-film transistor constituting the CMOS buffer, has a longer gate length than that of the other transistor.
摘要翻译： 提供了一种包括有源矩阵型液晶显示器的驱动电路，其能够降低包含在扫描线驱动电路和图像信号线驱动电路中的CMOS缓冲器的功耗。 液晶显示器具有有源矩阵型液晶显示元件，其包括连接到多条扫描线的开关元件和垂直于扫描线的多条图像信号线。 液晶显示器包括数字电路，其中用于经由扫描线向扫描脉冲施加扫描脉冲的扫描线驱动电路和用于向图像信号线施加图像信号的图像信号线驱动电路中的至少一个包括一个 CMOS缓冲器或者多级连接的CMOS缓冲器级，CMOS晶体管或者每个CMOS晶体管包括形成在同一衬底上的N型薄膜晶体管和P型薄膜晶体管。 在液晶显示器中，在构成CMOS缓冲器的N型薄膜晶体管和P型薄膜晶体管中，在电路工作期间具有较长截止时间的一个晶体管具有较长的栅极长度 比另一个晶体管。
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公开(公告)号：US09104257B2
公开(公告)日：2015-08-11
申请号：US13425648
申请日：2012-03-21
CPC分类号： G06F3/0412 , G09G3/3648 , G09G2356/00
摘要： According to one embodiment, a display apparatus includes signal lines, and pixels. Each of the pixels includes a pixel electrode and a pixel control switch, and being classified into any of pixel groups. Each of the pixel groups includes a memory, and a sensor circuit which is configured to provide data for a detection signal to the memory when detecting the input information. The pixel control switch is configured to switch the voltage level of the pixel electrode in accordance with data for the display signal input via the signal line and the data for the detection signal input from the memory.
摘要翻译： 根据一个实施例，显示装置包括信号线和像素。 每个像素包括像素电极和像素控制开关，并且被分类为任何像素组。 每个像素组包括存储器和传感器电路，其被配置为当检测到输入信息时向存储器提供用于检测信号的数据。 像素控制开关被配置为根据用于经由信号线输入的显示信号的数据和用于从存储器输入的检测信号的数据来切换像素电极的电压电平。
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6.发明授权Liquid crystal display having a source driver and scanning line drive circuit that is shutdown 有权具有关闭的源极驱动器和扫描线驱动电路的液晶显示器公开(公告)号：US07187421B2
公开(公告)日：2007-03-06
申请号：US10886628
申请日：2004-07-09
IPC分类号： G02F1/136
CPC分类号： G09G3/3655 , G09G3/3614 , G09G2300/0876 , G09G2330/02
摘要： A liquid crystal display according to one embodiment of the present invention, comprising: signal lines and scanning lines arranged in first and second directions on an insulation substrate; display elements formed in vicinity of cross points of the signal lines and scanning lines; liquid crystal capacitors and auxiliary capacitors which accumulate electric charge in accordance with voltages of the signal lines via said display elements; a signal line drive circuit which drives the signal lines; a scanning line drive circuit which drives the scanning lines; auxiliary capacitor power supply lines arranged in the first direction, to which one ends of said auxiliary capacitors arranged in the second direction are commonly connected; and auxiliary capacitor power supply line voltage control circuits which control voltages of said auxiliary capacitor power supply lines in sync with a cycle which drives said liquid crystal capacitors and said auxiliary capacitors by polarity reverse, wherein said auxiliary capacitor power supply line voltage control circuit supplies a first reference voltage to all of said auxiliary capacitor power supply lines during a predetermine period after power-on.
摘要翻译： 根据本发明的一个实施例的液晶显示器，包括：在绝缘基板上沿第一和第二方向布置的信号线和扫描线; 形成在信号线和扫描线的交叉点附近的显示元件; 液晶电容器和辅助电容器，其通过所述显示元件根据信号线的电压累积电荷; 驱动信号线的信号线驱动电路; 驱动扫描线的扫描线驱动电路; 辅助电容器电源线布置在第一方向上，所述辅助电容器的沿第二方向布置的一端共同连接到该辅助电容器电源线; 以及辅助电容器电源线电压控制电路，其将所述辅助电容器电源线的电压与通过极性反向驱动所述液晶电容器和所述辅助电容器的周期同步，其中所述辅助电容器电源线电压控制电路提供 在上电之后的预定时段期间，向所有辅助电容器电源线提供第一参考电压。
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7.发明授权公开(公告)号：US06940483B2
公开(公告)日：2005-09-06
申请号：US10325937
申请日：2002-12-23
CPC分类号： G09G3/3659 , G09G2300/0809 , G09G2300/0857
摘要： During a still picture display period, a normal write voltage is sometimes unable to be applied to a liquid crystal layer 16 because two memory switch elements 21 and 22 are simultaneously turned on, and the output and the inverted output from the digital memory 18 are applied simultaneously to a pixel electrode 13. According to the present invention, the pulse width for the on period of one of the memory switch elements 21 and 22 is narrower than the pulse width for the off period of the other memory switch element, so that the on periods of the two memory switch elements 21 and 22 do not overlap. In this manner, the memory switch elements 21 and 22 are prevented from being turned on at the same time.
摘要翻译： 在静止图像显示期间，由于两个存储器开关元件21和22同时导通，所以正常的写入电压有时不能施加到液晶层16，并且应用来自数字存储器18的输出和反相输出 根据本发明，一个存储开关元件21和22的导通周期的脉冲宽度比另一个存储器开关元件的截止周期的脉冲宽度窄，因此， 两个存储开关元件21和22的周期不重叠。 以这种方式，防止存储器开关元件21和22同时导通。
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8.发明授权公开(公告)号：US08305327B2
公开(公告)日：2012-11-06
申请号：US12468409
申请日：2009-05-19
申请人： Yoshiro Aoki , Takanori Tsunashima
发明人： Yoshiro Aoki , Takanori Tsunashima
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2300/0408 , G09G2310/0289
摘要： Provided is a waveform processing circuit including: an amplitude expansion circuit configured to expand amplitude of an analog video signal; a voltage shifting circuit configured to shift a voltage of the analog video signal; and an impedance conversion circuit having an output impedance lower than that of the voltage shifting circuit.
摘要翻译： 提供了一种波形处理电路，包括：幅度扩展电路，被配置为扩大模拟视频信号的幅度; 电压移位电路，被配置为移位所述模拟视频信号的电压; 以及阻抗转换电路，其输出阻抗低于电压移位电路的输出阻抗。
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9.发明授权公开(公告)号：US07053876B2
公开(公告)日：2006-05-30
申请号：US10608027
申请日：2003-06-30
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G2300/0842 , G09G2300/0857 , G09G2320/0261
摘要： In a flat panel display device configured to allow moving image data supplied through a signal line 11 to be written to a pixel electrode 13 during typical display operation and further to allow still image data latched in a digital memory 18 to be written to the pixel electrode 13 during still image display operation. When switching from a typical display to a still image display, at least two frames following the completion of the switching operation are assigned as write frames to allow still image data to be written to the digital memory 18. This allows the still image data to be written normally to the digital memory 18 even when the rise times of a memory control signal and a common signal are made longer than a vertical blanking period.
摘要翻译： 在平面显示装置中，被配置为允许在典型显示操作期间通过信号线11提供的运动图像数据被写入像素电极13，并且还允许锁存在数字存储器18中的静止图像数据被写入像素电极 静态图像显示操作中13。 当从典型显示切换到静止图像显示时，在切换操作完成之后的至少两个帧被分配为写入帧，以允许将静止图像数据写入数字存储器18。 即使使存储器控制信号和公共信号的上升时间长于垂直消隐周期，也能够将静止图像数据正常地写入数字存储器18。
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公开(公告)号：US20050036078A1
公开(公告)日：2005-02-17
申请号：US10886628
申请日：2004-07-09
IPC分类号： G02F1/133 , G02F1/1343 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3655 , G09G3/3614 , G09G2300/0876 , G09G2330/02
摘要： A liquid crystal display according to one embodiment of the present invention, comprising: signal lines and scanning lines arranged in first and second directions on an insulation substrate; display elements formed in vicinity of cross points of the signal lines and scanning lines; liquid crystal capacitors and auxiliary capacitors which accumulate electric charge in accordance with voltages of the signal lines via said display elements; a signal line drive circuit which drives the signal lines; a scanning line drive circuit which drives the scanning lines; auxiliary capacitor power supply lines arranged in the first direction, to which one ends of said auxiliary capacitors arranged in the second direction are commonly connected; and auxiliary capacitor power supply line voltage control circuits which control voltages of said auxiliary capacitor power supply lines in sync with a cycle which drives said liquid crystal capacitors and said auxiliary capacitors by polarity reverse, wherein said auxiliary capacitor power supply line voltage control circuit supplies a first reference voltage to all of said auxiliary capacitor power supply lines during a predetermine period after power-on.
摘要翻译： 根据本发明的一个实施例的液晶显示器，包括：在绝缘基板上沿第一和第二方向布置的信号线和扫描线; 形成在信号线和扫描线的交叉点附近的显示元件; 液晶电容器和辅助电容器，其通过所述显示元件根据信号线的电压累积电荷; 驱动信号线的信号线驱动电路; 驱动扫描线的扫描线驱动电路; 辅助电容器电源线布置在第一方向上，所述辅助电容器的沿第二方向布置的一端共同连接到该辅助电容器电源线; 以及辅助电容器电源线电压控制电路，其将所述辅助电容器电源线的电压与通过极性反向驱动所述液晶电容器和所述辅助电容器的周期同步，其中所述辅助电容器电源线电压控制电路提供 在上电之后的预定时段期间，向所有辅助电容器电源线提供第一参考电压。
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