公开(公告)号：US09594616B2

公开(公告)日：2017-03-14

申请号：US14781835

申请日：2014-03-25

Applicant: ZTE Corporation

Inventor： Haiming Jiang ,  Jiancheng Liu

IPC: G06F11/00 ,  G06F11/07 ,  H04L12/08 ,  H04L12/70 ,  H04L12/26

CPC classification number: G06F11/076 ,  G06F11/0721 ,  H04L12/08 ,  H04L43/02 ,  H04L43/08 ,  H04L43/16 ,  H04L47/00

Abstract: Provided are a method for implementing counting control of a counter in a network chip, and a network chip. The method includes: periodically generating a counting value scanning message; reading a counting value of a corresponding counter item according to the generated counting value scanning message; analyzing and judging whether the read counting value is less than a preset overflow threshold; and informing the processor to handle counting abnormality of the counter when the read counting value is not less than the preset overflow threshold. The system can realize the periodic diagnosis on the counting state of the counter in the network chip by using a packet generator and a message processing engine, so as to prevent the processor from constantly sampling the counter to check the state of the counter, and ensure the calculation performance of the processor.

Abstract translation: 提供一种用于实现网络芯片中的计数器的计数控制的方法和网络芯片。 该方法包括：周期性地产生计数值扫描消息; 根据生成的计数值扫描消息读取相应计数器项的计数值; 分析和判断读取计数值是否小于预设的溢出阈值; 并且当读取计数值不小于预设溢出阈值时，通知处理器处理计数器的计数异常。 该系统可以通过使用分组生成器和消息处理引擎来实现对网络计数器的计数状态的定期诊断，以防止处理器对计数器进行不断采样以检查计数器的状态，并确保 处理器的计算性能。

公开(公告)号：US09836338B2

公开(公告)日：2017-12-05

申请号：US14776969

申请日：2014-03-05

Applicant: ZTE Corporation

Inventor： Haiming Jiang ,  Jiancheng Liu

IPC: G06F13/42 ,  G06F9/54 ,  G06F15/173 ,  G06F13/16 ,  G06F13/40 ,  G06F15/78

CPC classification number: G06F9/546 ,  G06F9/544 ,  G06F9/545 ,  G06F13/1673 ,  G06F13/4068 ,  G06F15/17306 ,  G06F15/7825

Abstract: Provided are a message interaction processing method and device. The method includes: a first buffer with a preset size is applied for to a Central Processing Unit (CPU) and/or a chip; and message interaction is performed between the CPU and the chip through the first buffer, wherein the first buffer is used for storing at least two messages. By the disclosure, the problem that frequent switching between states may cause high resource overhead and low message transmission efficiency under the condition of large message interaction between the CPU and the chip is solved, and the effect of remarkably improving message sending and receiving efficiency and performance of network equipment is further achieved.