公开(公告)号：US20050157583A1

公开(公告)日：2005-07-21

申请号：US10999810

申请日：2004-11-29

申请人： Franz Hofmann ,  Richard Luyken ,  Michael Specht

发明人： Franz Hofmann ,  Richard Luyken ,  Michael Specht

IPC分类号： G11C16/04 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/788 ,  G11C8/02

CPC分类号： H01L21/28273 ,  G11C16/0416 ,  G11C16/0483 ,  H01L21/28282 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/1203 ,  H01L29/66825 ,  H01L29/7881 ,  H01L29/7883

摘要： Memory cell having an auxiliary substrate, on which a first gate insulating layer is formed, a floating gate formed on the first gate insulating layer, an electrically insulating layer formed on the floating gate, a memory gate electrode formed on the electrically insulating layer, a substrate fixed to the memory gate electrode, a second gate insulating layer formed on a part of a surface of the auxiliary substrate, which surface is uncovered by partially removing the auxiliary substrate, a read gate electrode formed on the second gate insulating layer, and two source/drain regions located between a channel region essentially in and/or on a surface region of the remaining material of the auxiliary substrate that is free of the second gate insulating layer and the read gate electrode, the channel region being arranged in each case at least partly laterally overlapping the floating gate and the read gate electrode.

摘要翻译： 具有辅助基板的存储单元，其上形成有第一栅极绝缘层，形成在第一栅极绝缘层上的浮动栅极，形成在浮动栅极上的电绝缘层，形成在电绝缘层上的存储栅电极， 基板固定到存储栅电极，第二栅极绝缘层，形成在辅助基板的表面的一部分上，该表面通过部分去除辅助基板而被覆盖，形成在第二栅极绝缘层上的读取栅电极和两个 源极/漏极区域位于基本上在辅助衬底的剩余材料的表面区域和/或栅极绝缘层之间的沟道区域之间，沟道区域分别布置在 至少部分地侧向地重叠浮置栅极和读取栅电极。

公开(公告)号：US20050146940A1

公开(公告)日：2005-07-07

申请号：US10991342

申请日：2004-11-09

申请人： Franz Hofmann ,  Michael Specht

发明人： Franz Hofmann ,  Michael Specht

IPC分类号： G11C16/04 ,  H01L21/28 ,  H01L21/8247 ,  H01L21/84 ,  H01L27/115 ,  H01L27/12 ,  H01L29/788 ,  H01L29/792 ,  H01L21/00

CPC分类号： H01L27/11521 ,  G11C16/0491 ,  H01L21/28273 ,  H01L21/84 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/7881

摘要： Memory cells, formed as trench transistors, having a respective floating gate electrode and a control gate electrode at a trench wall above a channel region between doped regions for source and drain are provided with a gate electrode arranged in a further trench, via which gate electrode the channel region present in a semiconductor ridge between the trenches can additionally be driven.