公开(公告)号：US20120300548A1

公开(公告)日：2012-11-29

申请号：US13570960

申请日：2012-08-09

Applicant: BYEONG-HOON LEE ,  KI-HONG KIM ,  SEUNG-WON LEE ,  SUN-KWON KIM

Inventor： BYEONG-HOON LEE ,  KI-HONG KIM ,  SEUNG-WON LEE ,  SUN-KWON KIM

IPC: G11C16/04

CPC classification number: G11C16/0483

Abstract: A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

Abstract translation: 存储器系统包括操作以控制存储器的存储器和存储器控制器。 存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

公开(公告)号：US20120159428A1

公开(公告)日：2012-06-21

申请号：US13332008

申请日：2011-12-20

Applicant: Soo Yong Park ,  Seung Won Lee ,  Shi Hwa Lee ,  Soo Jin Park

Inventor： Soo Yong Park ,  Seung Won Lee ,  Shi Hwa Lee ,  Soo Jin Park

IPC: G06F9/44

CPC classification number: G06F8/314 ,  G06F8/36

Abstract: A method and apparatus for authoring an architecture for transforming a single-core based embedded software application to a multi-core based embedded software application, and a method of determining an architectural pattern in a multimedia system. It is possible to perform an architecture authoring operation by using an architectural decision supporter, without prior knowledge and accumulated knowledge regarding a software architecture. Additionally, it is possible to prevent an error from occurring during authoring of an architecture, by using a concurrency-related software architectural pattern that is already evaluated. Thus, it is possible to improve overall quality of software, and to reduce a development time.

Abstract translation: 一种用于创建用于将基于单核的嵌入式软件应用程序转换为基于多核的嵌入式软件应用程序的架构的方法和装置，以及确定多媒体系统中的架构模式的方法。 可以通过使用架构决策支持者来执行架构创作操作，而不需要有关软件架构的事先知识和积累的知识。 此外，可以通过使用已经评估的并发相关的软件体系结构模式来防止在创建架构期间发生错误。 因此，可以提高软件的整体质量，并且缩短开发时间。

公开(公告)号：US20120139577A1

公开(公告)日：2012-06-07

申请号：US13240031

申请日：2011-09-22

Applicant: Seung-won LEE

Inventor： Seung-won LEE

IPC: H03K19/00 ,  H01L27/06

CPC classification number: H01L23/573 ,  G01R31/31719 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A hacking detecting device includes a metal line capacitor, a charge providing unit, a charge storing unit and a hacking deciding unit. The metal line capacitor has a first metal line and a second metal line. The charge providing unit periodically charges the metal line capacitor. The charge storing unit accumulates charges periodically stored in the metal line capacitor, and generates an output voltage corresponding to an amount of the accumulated charges. The hacking deciding unit determines whether the metal line capacitor is exposed based on the output voltage of the charge storing unit.

Abstract translation: 黑客检测装置包括金属线电容器，充电提供单元，电荷存储单元和黑客判定单元。 金属线电容器具有第一金属线和第二金属线。 充电提供单元周期性地对金属线电容器进行充电。 电荷存储单元累积周期性地存储在金属线电容器中的电荷，并且产生与累积电荷量对应的输出电压。 黑客决定单元基于电荷存储单元的输出电压确定金属线电容器是否露出。

公开(公告)号：US20120023505A1

公开(公告)日：2012-01-26

申请号：US13099453

申请日：2011-05-03

Applicant: Young Sam SHIN ,  Seung Won LEE ,  Min Young SON ,  Shi Hwa LEE

Inventor： Young Sam SHIN ,  Seung Won LEE ,  Min Young SON ,  Shi Hwa LEE

IPC: G06F9/46

CPC classification number: G06F9/526 ,  G06F9/4881

Abstract: Provided is a method and apparatus for ensuring a deterministic execution characteristic of an application program to perform data processing and execute particular functions in a computing environment using a micro architecture. A lock controlling apparatus based on a deterministic progress index (DPI) may include a loading unit to load a DPI of a first core and a DPI of a second core among DPIs of a plurality of cores at a lock acquisition point in time of each thread, a comparison unit to compare the DPI of the first core and the DPI of the second core, and a controller to assign a lock to a thread of the first core when the DPI of the first core is less than the DPI of the second core and when the second core corresponds to a last core to be compared among the plurality of cores.

Abstract translation: 提供了一种用于确保应用程序的确定性执行特性以执行数据处理并且在使用微架构的计算环境中执行特定功能的方法和装置。 基于确定性进度指标（DPI）的锁定控制装置可以包括加载单元，用于在每个线程的锁定获取点处在多个核心的DPI中加载第一核心的DPI和第二核心的DPI 比较单元，用于比较第一核心的DPI和第二核心的DPI;以及控制器，当第一核心的DPI小于第二核心的DPI时，分配锁定到第一核心的线程 并且当第二核心对应于在多个核心之间要比较的最后一个核心时。

公开(公告)号：US20110167427A1

公开(公告)日：2011-07-07

申请号：US12907639

申请日：2010-10-19

Applicant: Jeong Joon YOO ,  Shi Hwa Lee ,  Seung Won Lee ,  Young Sam Shin ,  Min Yung Son

Inventor： Jeong Joon YOO ,  Shi Hwa Lee ,  Seung Won Lee ,  Young Sam Shin ,  Min Yung Son

IPC: G06F9/46

CPC classification number: G06F9/4881

Abstract: A computing system, method and computer-readable medium is provided. To prevent a starvation phenomenon from occurring in a priority-based task scheduling, a plurality of tasks may be divided into a priority-based group and other groups. The groups to which the tasks belong may be changed.

Abstract translation: 提供了一种计算系统，方法和计算机可读介质。 为了防止在基于优先级的任务调度中出现饥饿现象，可将多个任务分为基于优先级的组和其他组。 任务所属的组可能会更改。

公开(公告)号：US20110119656A1

公开(公告)日：2011-05-19

申请号：US12923869

申请日：2010-10-12

Applicant: Jae Don Lee ,  Shi Hwa Lee ,  Seung Won Lee ,  Chae Seok Im ,  Min Kyu Jeong

Inventor： Jae Don Lee ,  Shi Hwa Lee ,  Seung Won Lee ,  Chae Seok Im ,  Min Kyu Jeong

IPC: G06F9/44

CPC classification number: G06F11/0703 ,  G06F11/0736 ,  G06F11/366 ,  G06F11/3664

Abstract: Disclosed are a system, method and computer-readable medium related to processing debug information from an embedded system. Source code of an application program to be used in an embedded system may be compiled by a computing system. The application program may include a debug code line. A minimum amount of debug information is stored in an embedded system, reducing memory overhead and waste of clock cycles of a processor.

Abstract translation: 公开了一种与从嵌入式系统处理调试信息相关的系统，方法和计算机可读介质。 在嵌入式系统中使用的应用程序的源代码可以由计算系统编译。 应用程序可以包括调试代码行。 最少量的调试信息存储在嵌入式系统中，减少了内存开销并浪费了处理器的时钟周期。

公开(公告)号：US07932725B2

公开(公告)日：2011-04-26

申请号：US12132249

申请日：2008-06-03

Applicant: Seung-Won Lee

Inventor： Seung-Won Lee

IPC: G01R31/08 ,  G06F12/14

CPC classification number: G06K19/07372 ,  G06F21/73

Abstract: Disclosed is a semiconductor integrated circuit which includes a pre-charge capacitor connected to a check node pre-charged. A sense capacitor is configured to discharge the check node. A detector is configured to detect whether the sense capacitor is exposed, based upon a voltage of the check node after a predetermined length of time has elapsed.

Abstract translation: 公开了一种半导体集成电路，其包括连接到预充电的校验节点的预充电电容器。 感测电容器被配置为放电校验节点。 检测器被配置为基于在经过预定时间长度之后的校验节点的电压来检测感测电容器是否暴露。

公开(公告)号：US20100312919A1

公开(公告)日：2010-12-09

申请号：US12636443

申请日：2009-12-11

Applicant: Uee Song LEE ,  Seung Won Lee ,  Ju Ho Ha ,  Kyung Hwan Kim ,  Jong Pil Won ,  Jung Su Lee

Inventor： Uee Song LEE ,  Seung Won Lee ,  Ju Ho Ha ,  Kyung Hwan Kim ,  Jong Pil Won ,  Jung Su Lee

IPC: G06F3/00 ,  G06F9/46 ,  G06F13/42 ,  G06F13/00

CPC classification number: G06F9/54

Abstract: A mobile terminal and a method for controlling the mobile terminal to be used through a host device are disclosed. The method for controlling the mobile terminal to be used through the host device includes transmitting a virtualization engine and driver programs of user modes of the mobile terminal to the host device; selecting one of the user modes; and transmitting information of the selected one user mode to the host device, wherein the transmitted virtualization engine is recognized as a part of an operating system (OS) of the host device, and is programmed to drive a driver program corresponding to each of the user modes within the host device.

Abstract translation: 公开了一种用于通过主机设备来控制移动终端的移动终端和方法。 用于控制通过主机设备使用的移动终端的方法包括将虚拟化引擎和移动终端的用户模式的驱动程序传送到主机设备; 选择一种用户模式; 以及将所选择的一个用户模式的信息发送到所述主机设备，其中所述发送的虚拟化引擎被识别为所述主机设备的操作系统（OS）的一部分，并且被编程为驱动与所述用户中的每一个相对应的驱动程序 主机设备内的模式。

公开(公告)号：US20100232227A1

公开(公告)日：2010-09-16

申请号：US12689091

申请日：2010-01-18

Applicant: Seung-Won Lee

Inventor： Seung-Won Lee

IPC: G11C16/04 ,  G11C16/06

CPC classification number: G11C16/3454 ,  G11C16/10

Abstract: A non-volatile memory device including a memory cell array; a read/write circuit configured to drive bit lines of the memory cell array with a negative bit line voltage according to data to be programmed; a bit line setup-time measuring circuit configured to measure the bit line setup-time, which may be a function of the amount of data to be programmed, at each ISPP program loop; and a control logic configured to control the program voltage and/or the applied time of a program voltage applied to the selected wordline of the memory cell array based on the measured bit line setup-times measured at each ISPP program loop.

Abstract translation: 一种包括存储单元阵列的非易失性存储器件; 读/写电路，被配置为根据要编程的数据以负位线电压驱动存储单元阵列的位线; 位线建立时间测量电路，被配置为在每个ISPP程序循环中测量位线建立时间，其可以是要编程的数据量的函数; 以及控制逻辑，被配置为基于在每个ISPP程序循环中测量的测量位线建立时间来控制施加到存储器单元阵列的选定字线的编程电压的施加时间和/或施加时间。

公开(公告)号：US07679964B2

公开(公告)日：2010-03-16

申请号：US11652823

申请日：2007-01-12

Applicant: Seung-Won Lee

Inventor： Seung-Won Lee

IPC: G11C16/12

CPC classification number: H01L29/7881 ,  G11C16/30

Abstract: A semiconductor memory device controlling a program voltage according to the number of cells to be programmed and a method of programming the same. The semiconductor memory device includes a memory cell array. A write data buffer receives write data in a predetermined unit. A program cell counter calculates the amount of data, from the write data, to be programmed in the memory cell array. A program voltage generator outputs a program voltage to be applied to the memory cell array, in accordance with the amount of data to be programmed, at a time, in the memory cell array. The program voltage is controlled in accordance with the number of memory cells to be programmed.

Abstract translation: 根据要编程的单元数量控制编程电压的半导体存储器件及其编程方法。 半导体存储器件包括存储单元阵列。 写数据缓冲器以预定单元接收写数据。 程序单元计数器从写入数据计算要在存储器单元阵列中编程的数据量。 程序电压发生器根据存储单元阵列中每次要编程的数据量来输出要施加到存储单元阵列的编程电压。 程序电压根据要编程的存储单元的数量进行控制。