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    SYSTEM AND METHOD FOR OPTICAL LICENSE PLATE MATCHING
    91.
    发明申请
    SYSTEM AND METHOD FOR OPTICAL LICENSE PLATE MATCHING 审中-公开
    光学牌照匹配系统与方法

    公开(公告)号：US20110194733A1

    公开(公告)日：2011-08-11

    申请号：US13025744

    申请日：2011-02-11

    申请人： James Wilson

    发明人： James Wilson

    IPC分类号： G06K9/00

    CPC分类号： G06K9/033 ,  G06K9/00785 ,  G06K9/325 ,  G06K2209/15

    摘要： An automated system and method are disclosed for reading license plate characters and associating the image with a vehicle by comparing to existing images and supplementing the automated system with manual review, comprising: capturing a first license plate image; processing the first image with optical character recognition equipment to produce an OCR result; associating the OCR result with a confidence level. If the confidence level is above a predetermined threshold, determining whether the OCR result matches a previously-obtained OCR result and if the confidence level is not above the predetermined threshold, presenting the first image for a manual review to produce a manual result.

    摘要翻译： 公开了一种自动化系统和方法，用于读取车牌字符并通过与现有图像进行比较并将图像与车辆相关联并且用自动系统补充手动审查，其包括：捕获第一车牌图像; 用光学字符识别设备处理第一个图像以产生OCR结果; 将OCR结果与置信水平相关联。 如果置信水平高于预定阈值，则确定OCR结果是否与先前获得的OCR结果相匹配，并且如果置信水平不高于预定阈值，则呈现用于手动审查的第一图像以产生手动结果。

    Memory sensing and latching circuit
    93.
    发明授权
    Memory sensing and latching circuit 有权
    存储器感应和锁存电路

    公开(公告)号：US07760568B2

    公开(公告)日：2010-07-20

    申请号：US12009566

    申请日：2008-01-18

    申请人： James Wilson ,  Gregg Hoyer

    发明人： James Wilson ,  Gregg Hoyer

    IPC分类号： G11C11/00

    CPC分类号： G11C7/065 ,  G11C7/067 ,  G11C7/08 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1066

    摘要： According to one exemplary embodiment, a memory sensing and latching circuit includes a sensing circuit for evaluating bit lines in a memory array and providing a sensed output. The memory sensing and latching circuit further includes a latching circuit including a dynamic one-shot circuit driven by the sensed output, a sense amplifier enable signal, and a precharge clock. The latching circuit further includes a storage circuit for storing a one-shot output of the dynamic one-shot circuit, where the one-shot output corresponds to the sensed output. The one-shot output of the dynamic one-shot circuit is stored in the storage circuit during an evaluation of the sensed output. The evaluation of the sensed output is responsive to the sense amplifier enable signal.

    摘要翻译： 根据一个示例性实施例，存储器感测和锁存电路包括用于评估存储器阵列中的位线并提供感测输出的感测电路。 存储器感测和锁存电路还包括一个锁存电路，该锁存电路包括由感测输出驱动的动态单稳态电路，一个读出放大器使能信号和一个预充电时钟。 锁存电路还包括用于存储动态单稳态电路的单次输出的存储电路，其中单触发输出对应于所感测的输出。 在感测输出的评估期间，动态单稳态电路的单次输出被存储在存储电路中。 感测输出的评估响应于读出放大器使能信号。

    Method and system for efficiently retrieving secured data by securely pre-processing provided access information
    99.
    发明申请
    Method and system for efficiently retrieving secured data by securely pre-processing provided access information 有权
    通过安全地预处理提供的访问信息来有效地检索安全数据的方法和系统

    公开(公告)号：US20070094511A1

    公开(公告)日：2007-04-26

    申请号：US11638445

    申请日：2006-12-14

    申请人： James Wilson ,  Robert Snapp ,  David Payne ,  Edgar Gillock

    发明人： James Wilson ,  Robert Snapp ,  David Payne ,  Edgar Gillock

    IPC分类号： H04L9/00

    CPC分类号： G06F21/6209 ,  G06F12/1408 ,  G06F17/30483 ,  G06F21/6245 ,  G07B2017/00782 ,  H04L9/3236 ,  H04L9/34 ,  Y10S707/99942

    摘要： A method and system for efficiently retrieving secured data by securely pre-processing provided access information, provides data store security based on a single piece of access information, which is generally public, such as the proper name of a business or individual that is used to retrieve mailing address information. The access information is hashed for access to a secured data store and efficient access and low data storage for permutations of input access information are provided by verifying the presence of an entry for the hashed access information in a look-up table. If an entry is found, the data store is accessed using the hashed access information, but if an entry is not found, another look-up table corresponding to another information type may be tried or the input access information permuted and retried.

    摘要翻译： 一种用于通过安全地预处理所提供的访问信息来有效地检索安全数据的方法和系统，基于通常公开的单个访问信息提供数据存储安全性，诸如用于业务或个人的正确名称 检索邮寄地址信息。 访问信息被散列以访问安全数据存储，并且通过在查找表中验证散列访问信息的条目的存在来提供有效访问和用于排列输入访问信息的低数据存储。 如果找到条目，则使用散列访问信息访问数据存储，但是如果没有找到条目，则可以尝试对应于另一种信息类型的另一个查找表，或者输入访问信息被置换和重试。

    Pipelined digital signal processor
    100.
    发明申请
    Pipelined digital signal processor 有权
    流水线数字信号处理器

    公开(公告)号：US20070094483A1

    公开(公告)日：2007-04-26

    申请号：US11258801

    申请日：2005-10-26

    申请人： James Wilson ,  Joshua Kablotsky ,  Yosef Stein ,  Colm Prendergast ,  Gregory Yukna ,  Christopher Mayer

    发明人： James Wilson ,  Joshua Kablotsky ,  Yosef Stein ,  Colm Prendergast ,  Gregory Yukna ,  Christopher Mayer

    IPC分类号： G06F15/00

    CPC分类号： G06F9/3001 ,  G06F9/345 ,  G06F9/3885

    摘要： Reducing pipeline stall between a compute unit and address unit in a processor can be accomplished by computing results in a compute unit in response to instructions of an algorithm; storing in a local random access memory array in a compute unit predetermined sets of functions, related to the computed results for predetermined sets of instructions of the algorithm; and providing within the compute unit direct mapping of computed results to related function.

    摘要翻译： 减少处理器中的计算单元和地址单元之间的流水线停顿可以通过响应于算法的指令在计算单元中计算结果来实现; 在计算单元中存储与本算法的预定指令集合的计算结果相关的预定函数集的局部随机存取存储器阵列; 并且在计算单元内提供计算结果与相关功能的直接映射。