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公开(公告)号：US6100935A
公开(公告)日：2000-08-08
申请号：US10591
申请日：1998-01-22
申请人： Tetsuhiko Inoue
发明人： Tetsuhiko Inoue
CPC分类号： H04N5/126
摘要： A field decision unit capable of solving a problem involved in a conventional field decision unit in that an internal synchronizing signal can be erroneously synchronized with the equalizing pulses of a video signal owing to noise because the output halt period of a phase comparator is set rather short considering that this will facilitate the synchronization of the internal synchronizing signal with the video signal when starting the system or the like, and hence an incorrect field decision can be made. The present field decision unit includes an output controller which sets output halt pulses with a longer output halt period in a particular interval consisting of the synchronizing cycles containing the equalizing pulses and a synchronizing cycle previous thereto, and which employs output halt pulses with a shorter output halt period outside the particular interval as in the conventional system.
摘要翻译： 由于相位比较器的输出停止时间设定得相当短，能够解决常规场决策单元涉及的问题的场决策单元，因为内部同步信号可能由于噪声而与视频信号的均衡脉冲同步 考虑到这将有助于在启动系统等时内部同步信号与视频信号的同步，因此可以做出不正确的现场决定。 本场决定单元包括输出控制器，其在由包含均衡脉冲的同步周期和与之前的同步周期组成的特定间隔中设置具有较长输出停止周期的输出停止脉冲，并且采用具有较短输出的输出停止脉冲 如在常规系统中那样在特定间隔之外停止时段。
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公开(公告)号：US6005357A
公开(公告)日：1999-12-21
申请号：US45653
申请日：1998-03-20
申请人： Jeong-Ho Bang
发明人： Jeong-Ho Bang
摘要： A vertical oscillation circuit includes a self raster discriminating circuit for selectively outputting a vertical sync signal and a vertical flyback signal; a vertical flyback pulse generator for determining the duty of the vertical flyback signal; a pulse level pull up for receiving the duty-determined pulse, thereby inverting its phase and shifting its level; a V-HOLD stage for receiving a vertical hold signal, and then outputting a pulse in accordance with a horizontal cycle; a vertical linearity stage for outputting a vertical linearity control signal; a vertical size control stage for outputting a vertical size control signal; a vertical oscillation stage for receiving a vertical hold control signal, vertical linearity control signal, and vertical size control signal respectively output from the V-HOLD stage, vertical linearity stage, and vertical size control stage, and generating a ramp pulse while controlled by the phase-inverted and potential level shifted pulse output from the pulse level pull up; and a vertical position control stage for controlling the DC level of the vertical oscillation ramp pulse to thereby change vertical position.
摘要翻译： 垂直振荡电路包括用于选择性地输出垂直同步信号和垂直反激信号的自光栅鉴别电路; 用于确定垂直反激信号的占空比的垂直回扫脉冲发生器; 脉冲电平上拉以接收占空比脉冲，从而反转其相位并移位其电平; V-HOLD级，用于接收垂直保持信号，然后根据水平周期输出脉冲; 垂直线性度级，用于输出垂直线性控制信号; 用于输出垂直尺寸控制信号的垂直尺寸控制级; 用于接收从V-HOLD级，垂直线性级和垂直尺寸控制级分别输出的垂直保持控制信号，垂直线性控制信号和垂直尺寸控制信号的垂直振荡级，并且产生斜坡脉冲，同时由 相位反相和电位电平移位脉冲输出从脉冲电平上拉; 以及用于控制垂直振荡斜坡脉冲的直流电平从而改变垂直位置的垂直位置控制级。
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公开(公告)号：US5999222A
公开(公告)日：1999-12-07
申请号：US923296
申请日：1997-09-04
申请人： Guoxin Xie
发明人： Guoxin Xie
CPC分类号： H04N5/10
摘要： An improved high-performance vertical sync separator which can reliably operate during high frequency and non-standard video signal conditions and that utilizes a device-independent methodology. The synch separator includes a signal separator circuit having an input port for receiving a composite signal. A measuring device connected to the input port measures a first and second characteristic of the composite signal. A processor receives and compares the first and second characteristics, and recovers a vertical sync signal from the composite signal.
摘要翻译： 一种改进的高性能垂直同步分离器，可在高频和非标准视频信号条件下可靠地运行，并采用独立于设备的方法。 同步分离器包括具有用于接收复合信号的输入端口的信号分离器电路。 连接到输入端口的测量装置测量复合信号的第一和第二特性。 处理器接收并比较第一和第二特性，并且从复合信号中恢复垂直同步信号。
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公开(公告)号：US5995158A
公开(公告)日：1999-11-30
申请号：US740492
申请日：1996-10-30
申请人： Young-Chul Kim
发明人： Young-Chul Kim
摘要： A blanking signal generating control circuit for use in a video apparatus is disclosed. The blanking signal control circuit according to the present invention has structure which makes it easily adaptable for use with different broadcast standards, such as NTSC, PAL, SECAM, etc. The control circuit has an edge detector which generates a front edge detecting signal at the front edge of the vertical sync signal, and a rear edge detecting signal the trailing (or rear) edge of the vertical sync signal. The control circuit also has a field distinction signal generator for detecting odd and even fields in a video signal. A counting controller generates a counting control signal synchronized with the front edge detecting signal in response to the field distinction signal and a broadcasting system select signal. Line counting is performed starting from an initial value which is selected from a first or second initial value in response to the field distinction signal. Counting is done based on a pulse signal having a frequency of twice a horizontal synchronizing signal used as a clock signal, to generate a counted value. A comparator compares the counted value with a value which has been previously set to correspond to a selected broadcasting system; when the comparator indicates equality, a blanking signal is generated.
摘要翻译： 公开了一种用于视频设备中的消隐信号产生控制电路。 根据本发明的消隐信号控制电路具有使其易于适用于诸如NTSC，PAL，SECAM等不同广播标准的结构。控制电路具有边缘检测器，该边缘检测器在 垂直同步信号的前沿，后沿检测信号是垂直同步信号的尾部（或后部）边缘。 控制电路还具有用于检测视频信号中的奇数和偶数场的场区分信号发生器。 计数控制器响应于场区分信号和广播系统选择信号产生与前沿检测信号同步的计数控制信号。 从根据场区分信号从第一或第二初始值选择的初始值开始执行行计数。 基于具有用作时钟信号的两倍水平同步信号的频率的脉冲信号进行计数，以产生计数值。 比较器将计数值与先前设置为对应于所选择的广播系统的值进行比较; 当比较器指示相等时，产生消隐信号。
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公开(公告)号：US5995157A
公开(公告)日：1999-11-30
申请号：US16943
申请日：1998-02-02
申请人： Rafi Retter , Yonatan Manor , David Bar
发明人： Rafi Retter , Yonatan Manor , David Bar
摘要： In a composite video signal that contains an image field having vertical synchronization (V.sub.-- Sync) pulses, The V.sub.-- sync pulses include first equalization pulses of E.sub.1 waveforms followed by a serration pulses of S waveforms, T.sub.S -long each, followed by a second equalization pulse of E.sub.2 waveforms, T.sub.E -long each. The transition from a last waveform of the E.sub.1 waveforms to a first waveform of the S waveforms constitutes a vertical synchronization (V.sub.-- sync) signal. The system a reference event occurring at a first time interval .DELTA.T .sub.1 .+-.Er after said V.sub.-- sync signal, wherein Er stands for time shift error. The system includes filter for filtering the composite video signal so as to obtain a filtered signal. Clamper for clamping the filtered signal so as to obtain a clamped signal. First detector for detecting N (N.ltoreq.S) waveforms in the serration pulses thereby indicating first event occurrence. Second detector for detecting M (M.ltoreq.E.sub.2) waveforms in the second equalization pulses, thereby determining the reference event occurrence, such that the .DELTA.T .sub.1 equals M*T.sub.E +S*T.sub.S.
摘要翻译： 在包含具有垂直同步（V-Sync）脉冲的图像场的复合视频信号中，V同步脉冲包括E1波形的第一均衡脉冲，随后是S波形的锯齿脉冲，每个TS-长，随后是第二 E2波形的均衡脉冲，TE长。 从E1波形的最后波形到S波形的第一波形的转换构成垂直同步（V-sync）信号。 所述系统在所述V同步信号之后以第一时间间隔DELTA T 1 +/- Er发生参考事件，其中Er表示时移误差。 该系统包括用于对复合视频信号进行滤波以获得滤波信号的滤波器。 钳位器用于钳位滤波后的信号，以获得钳位信号。 第一检测器，用于检测锯齿脉冲中的N（N
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公开(公告)号：US5754251A
公开(公告)日：1998-05-19
申请号：US570855
申请日：1995-12-12
申请人： Robert W. Hulvey
发明人： Robert W. Hulvey
IPC分类号： H04N5/10
CPC分类号： H04N5/10
摘要： A digital video vertical synchronization pulse detector for detecting a vertical synchronization pulse in a video signal is disclosed. The digital video vertical synchronization pulse detector includes a threshold device for comparing a first digital data stream generated from the video signal to a sync threshold. An integration device integrates the video signal in response to the threshold device to generate a second digital data stream. Upper and lower threshold devices compare the second digital data stream to upper and lower thresholds. A detection device responsive to the upper and lower threshold devices detects when the second digital data stream crosses the upper and lower thresholds. When the second digital data stream crosses the upper threshold, the detection device generates a first vertical sync pulse and when the second digital data stream crosses the lower threshold, the detection device is reset to enable generation of subsequent vertical sync pulses.
摘要翻译： 公开了一种用于检测视频信号中的垂直同步脉冲的数字视频垂直同步脉冲检测器。 数字视频垂直同步脉冲检测器包括用于将从视频信号产生的第一数字数据流与同步阈值进行比较的阈值装置。 集成装置响应于阈值装置来集成视频信号以产生第二数字数据流。 上限和下限阈值器件将第二数字数据流与上限和下限进行比较。 响应于上限阈值装置和下限阈值装置的检测装置检测第二数字数据流何时越过上限和下限阈值。 当第二数字数据流越过上限阈值时，检测装置产生第一垂直同步脉冲，并且当第二数字数据流越过下阈值时，检测装置被复位以使得能够产生随后的垂直同步脉冲。
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公开(公告)号：US5621475A
公开(公告)日：1997-04-15
申请号：US336313
申请日：1994-11-08
申请人： Toshiaki Irie
发明人： Toshiaki Irie
CPC分类号： H04N5/10
摘要： The present invention provides a more reliable circuit for judging the existence of television image signals. A circuit for judging the existence of television image signals by counting the number of edges of the synchronous signals of a composite synchronous signals for a certain period, and judging the existence of TV image signals, wherein a mask timer circuit which masks signals generated following the synchronous signals for a certain period after the composite synchronous signal is detected, is installed before a synchronous counter.
摘要翻译： 本发明提供一种用于判断电视图像信号的存在的更可靠的电路。 一种用于通过对一段时间内的复合同步信号的同步信号的边缘数进行计数来判断电视图像信号的存在并判断TV图像信号的存在的电路，其中屏蔽定时器电路屏蔽在 在复合同步信号被检测到一段时间之后的同步信号被安装在同步计数器之前。
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公开(公告)号：US5608461A
公开(公告)日：1997-03-04
申请号：US413393
申请日：1995-03-29
申请人： Greg Sadowski , David L. Dignam
发明人： Greg Sadowski , David L. Dignam
CPC分类号： H04N5/10
摘要： A synchronizing device is described. The synchronizing device detects a video frame. The synchronizing device determines a duration of a first signal state of a video signal, determines a duration of a second signal state of the video signal and compares the duration of a first signal state with the duration of a second signal state.
摘要翻译： 描述了同步装置。 同步装置检测视频帧。 同步装置确定视频信号的第一信号状态的持续时间，确定视频信号的第二信号状态的持续时间，并将第一信号状态的持续时间与第二信号状态的持续时间进行比较。
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公开(公告)号：US5594506A
公开(公告)日：1997-01-14
申请号：US534241
申请日：1995-09-26
申请人： Jian Yang
发明人： Jian Yang
CPC分类号： H04N5/08 , H04N5/4401 , H04L7/046 , H04L7/08 , H04N5/04
摘要： A line sync detector for a digital television receiver receives digital television data including line synchronization code groups of four symbols having successive values of +S, -S, -S and +S at the beginning of each data line, S being a prescribed sample level. A first delay line has an input tap to which the digital television data are supplied, an output tap, first and second intermediate taps, a first symbol latch having an input connection from the input tap and having an output connection to the first intermediate tap, a second symbol latch having an input connection from the first intermediate tap and having an output connection to the second intermediate tap, and a third symbol latch having an input connection from the second intermediate tap and having an output connection to the output tap. The signals at the input tap, the first and second intermediate taps and the output tap of the first delay line are combined in 1:(-1):(-1):1 ratio to generate a combined response. A window detector receives the combined response and generates a response to the combined response whenever successive values of +S, -S, -S and +S occur in the digital television data supplied to the input tap of the first tapped delay line. A correlation filter responds to the response of the window detector for generating a re-inforced response to groups of successive values of +S, -S, -S and +S in the digital television data supplied to the input tap of the first delay line that recur at data line intervals. The reinforced response exhibits peaks when line synchronization code groups occur or are predicted to occur but in fact do not because of noise interference. A threshold detector detects when the reinforced response exceeds a prescribed threshold value in a prescribed polarity, for generating indications of when each line synchronization code group occurs.
摘要翻译： 用于数字电视接收机的行同步检测器接收数字电视数据，该数字电视数据包括在每条数据线的开始处具有+ S，-S，-S和+ S的连续值的四个符号的行同步码组，S是规定的采样电平 。 第一延迟线具有提供数字电视数据的输入抽头，输出抽头，第一和第二中间抽头，具有来自输入抽头的输入连接并具有到第一中间抽头的输出连接的第一符号锁存器， 具有来自第一中间抽头的输入连接并具有到第二中间抽头的输出连接的第二符号锁存器，以及具有来自第二中间抽头的输入连接并具有到输出抽头的输出连接的第三符号锁存器。 输入抽头上的信号，第一和第二中间抽头和第一延迟线的输出抽头以1：（ - 1）：（ - 1）：1的比率组合，以产生组合响应。 当提供给第一抽头延迟线的输入抽头的数字电视数据中出现+ S，-S，-S和+ S的连续值时，窗口检测器接收组合响应并产生对组合响应的响应。 相关滤波器响应于窗口检测器的响应，用于在提供给第一延迟线的输入抽头的数字电视数据中产生对+ S，-S，-S和+ S的连续值的组的再反应响应 以数据行间隔重现。 当行同步码组出现或预测发生时，加强响应表现出峰值，但实际上不是因为噪声干扰。 阈值检测器检测加强响应何时超过预定极性的规定阈值，用于产生每行行同步代码组何时出现的指示。
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公开(公告)号：US5502501A
公开(公告)日：1996-03-26
申请号：US220566
申请日：1994-03-31
摘要： Jitter of an overlay display with respect to the primary display of a television receiver is avoided by assuring that the vertical and horizontal blanking signal components are sufficiently time spaced by preventing the number of clock pulses occurring between the horizontal and vertical components of the blanking signal from going below a selected number. The number of clock pulses between the negative going transition of the vertical blanking signal and the positive going transition of the first horizontal blanking signal is tracked and when the number of pulses fails to exceed a reference value the number of pulses is changed to effectively shift the transitions with respect to one another.
摘要翻译： 通过确保垂直和水平消隐信号分量足够的时间间隔，通过防止在消隐信号的水平和垂直分量之间发生的时钟脉冲的数量来避免电视接收机的主显示器的重叠显示的抖动 低于选定的数字。 跟踪垂直消隐信号的负向转变和第一水平消隐信号的正向转换之间的时钟脉冲数，并且当脉冲数不能超过参考值时，脉冲数被改变以有效地移位 相互转换。
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