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120 条记录 (耗时 0.039 秒)

    PROGRAMMABLE SEMICONDUCTOR DEVICE
    101.
    发明申请
    PROGRAMMABLE SEMICONDUCTOR DEVICE 有权
    可编程半导体器件

    公开(公告)号：US20060087001A1

    公开(公告)日：2006-04-27

    申请号：US10904058

    申请日：2004-10-21

    申请人： Chandrasekharan Kothandaraman ,  Subramanian Iyer

    发明人： Chandrasekharan Kothandaraman ,  Subramanian Iyer

    IPC分类号： H01L29/00

    CPC分类号： H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A programmable device (eFuse), includes: a substrate (10); an insulator (13) on the substrate; an elongated semiconductor material (12) on the insulator, the elongated semiconductor material having a first end (12a), a second end (12b), a fuse link (11) between the ends, and an upper surface S. The semiconductor material includes a dopant having a concentration of at least 10*17/cc. The first end (12a) is wider than the second end (12b), and a metallic material is disposed on the upper surface. The metallic material is physically migratable along the upper surface responsive to an electrical current I flowable through the semiconductor material and through the metallic material.

    摘要翻译： 一种可编程器件（eF​​use），包括：衬底（10）; 绝缘体（13）; 在绝缘体上的细长半导体材料（12），所述细长半导体材料具有第一端（12a），第二端（12b），端部之间的熔断体（11）和上表面S.半导体 材料包括浓度为至少10×17 / cc的掺杂剂。 第一端（12a）比第二端（12b）宽，金属材料设置在上表面上。 响应于可流过半导体材料并通过金属材料的电流I，金属材料可沿着上表面物理迁移。

    Radio frequency-enabled electromigration fuse
    102.
    发明授权
    Radio frequency-enabled electromigration fuse 有权
    射频启用电迁移保险丝

    公开(公告)号：US08169321B2

    公开(公告)日：2012-05-01

    申请号：US12696104

    申请日：2010-01-29

    申请人： Subramanian S. Iyer ,  Chandrasekharan Kothandaraman ,  Gerard M. Salem

    发明人： Subramanian S. Iyer ,  Chandrasekharan Kothandaraman ,  Gerard M. Salem

    IPC分类号： H03K19/00 ,  G08B13/14

    CPC分类号： G01R31/02 ,  H03K19/173

    摘要： Embodiments of the invention provides a method, device, and system for programming an electromigration fuse (eFuse) using a radio frequency (RF) signal. A first aspect of the invention provides a method of testing circuitry on a semiconductor chip, the method comprising: receiving a radio frequency (RF) signal using at least one antenna on the semiconductor chip; powering circuitry on the semiconductor chip using the RF signal; activating a built-in self test (BIST) engine within the circuitry; determining whether a fault exists within the circuitry using the BIST; and programming an electromigration fuse (eFuse) to alter the circuitry in response to a fault being determined to exist.

    摘要翻译： 本发明的实施例提供了一种使用射频（RF）信号编程电迁移保险丝（eFuse）的方法，装置和系统。 本发明的第一方面提供了一种在半导体芯片上测试电路的方法，该方法包括：使用半导体芯片上的至少一个天线接收射频（RF）信号; 使用RF信号对半导体芯片供电; 激活电路内的内置自检（BIST）引擎; 确定使用BIST的电路内是否存在故障; 以及编程电迁移保险丝（eFuse）以响应于确定存在的故障来改变电路。

    Fin anti-fuse with reduced programming voltage
    103.
    发明授权
    Fin anti-fuse with reduced programming voltage 有权
    Fin反熔丝具有降低的编程电压

    公开(公告)号：US08030736B2

    公开(公告)日：2011-10-04

    申请号：US12538381

    申请日：2009-08-10

    申请人： Roger A. Booth, Jr. ,  Kangguo Cheng ,  Chandrasekharan Kothandaraman

    发明人： Roger A. Booth, Jr. ,  Kangguo Cheng ,  Chandrasekharan Kothandaraman

    IPC分类号： H01L23/52 ,  H01L21/82

    CPC分类号： H01L23/5252 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method forms an anti-fuse structure comprises a plurality of parallel conductive fins positioned on a substrate, each of the fins has a first end and a second end. A second electrical conductor is electrically connected to the second end of the fins. An insulator covers the first end of the fins and a first electrical conductor is positioned on the insulator. The first electrical conductor is electrically insulated from the first end of the fins by the insulator. The insulator is formed to a thickness sufficient to break down on the application of a predetermined voltage between the second electrical conductor and the first electrical conductor and thereby form an uninterrupted electrical connection between the second electrical conductor and the first electrical conductor through the fins.

    摘要翻译： 一种形成抗熔丝结构的方法包括位于基板上的多个平行的导电翅片，每个翼片具有第一端和第二端。 第二电导体电连接到散热片的第二端。 绝缘体覆盖翅片的第一端并且第一电导体位于绝缘体上。 第一电导体通过绝缘体与散热片的第一端电绝缘。 绝缘体形成为足以在第二电导体和第一电导体之间施加预定电压时分解的厚度，从而通过翅片在第二电导体和第一电导体之间形成不间断的电连接。

    SYSTEM FOR POWER PERFORMANCE OPTIMIZATION OF MULTICORE PROCESSOR CHIP
    108.
    发明申请
    SYSTEM FOR POWER PERFORMANCE OPTIMIZATION OF MULTICORE PROCESSOR CHIP 审中-公开
    多处理器芯片的功率性能优化系统

    公开(公告)号：US20090267179A1

    公开(公告)日：2009-10-29

    申请号：US12108905

    申请日：2008-04-24

    申请人： Subramanian S. Iyer ,  Babar Ali Khan ,  Chandrasekharan Kothandaraman ,  Norman Whitelaw Robson

    发明人： Subramanian S. Iyer ,  Babar Ali Khan ,  Chandrasekharan Kothandaraman ,  Norman Whitelaw Robson

    IPC分类号： H01L23/525

    CPC分类号： H01L23/5256 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A system in one embodiment includes a multiprocessor chip comprising a plurality of cores; a plurality of power circuits, each power circuit being coupled to one of the cores; and an electrically programmable fuse in each power circuit. Each electrically programmable fuse further comprises a first electrode coupled to the associated power circuit; a second electrode coupled to the associated power circuit; a first pad coupled to the first electrode; a second pad coupled to the second electrode; and an electrically conductive material extending between the first and second electrodes and forming part of the associated power circuit, the electrically conductive material being characterized as tending to electromigrate from one of the electrodes to the other electrode under an applied electrical current passing between the electrodes, wherein the electromigration increases an overall resistance of the power circuit.

    摘要翻译： 一个实施例中的系统包括包括多个核心的多处理器芯片; 多个电源电路，每个电源电路耦合到一个核心; 和每个电源电路中的电可编程保险丝。 每个电可编程保险丝还包括耦合到相关联的电力电路的第一电极; 耦合到相关联的电力电路的第二电极; 耦合到所述第一电极的第一焊盘; 耦合到所述第二电极的第二焊盘; 以及导电材料，其在所述第一和第二电极之间延伸并形成所述相关联的电力电路的一部分，所述导电材料的特征在于，在通过所述电极之间的施加的电流下，倾向于从所述电极之一电极转移到所述另一个电极， 其中电迁移增加了电源电路的整体电阻。