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公开(公告)号:US20230301119A1
公开(公告)日:2023-09-21
申请号:US17901744
申请日:2022-09-01
申请人: KIOXIA CORPORATION
发明人: Kensuke TAKAHASHI
CPC分类号: H01L27/249 , H01L45/1233 , H01L45/1206 , H01L27/2436
摘要: According to one embodiment, a memory device includes a first conductor layer and a second conductor layer spaced apart from each other in a first direction, a first semiconductor film spaced from the first conductor layer in a second direction intersecting the first direction, and a second semiconductor film spaced from the second conductor layer in the second direction. The first semiconductor film is between a first resistance change film and the first conductor layer in the second direction. The second semiconductor film is between a second resistance change film and the second conductor layer in the second direction. A first conductor film has a first end contacting the first semiconductor film and the first resistance change film and a second end contacting the second semiconductor film and the second resistance change film.
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公开(公告)号:US20190198759A1
公开(公告)日:2019-06-27
申请号:US16322344
申请日:2017-07-12
发明人: Jin Pyo HONG , Gwang Ho BAEK , Ah Rahm LEE , Tea Yoon KIM
CPC分类号: H01L45/1266 , G11C13/0011 , H01L27/2454 , H01L29/417 , H01L29/66 , H01L29/732 , H01L45/00 , H01L45/1206 , H01L45/1233 , H01L45/145 , H01L45/1658
摘要: Disclosed are a switching atomic transistor with a diffusion barrier layer and a method of operating the same. By introducing a diffusion barrier layer in an intermediate layer having a resistance change characteristic, it is possible to minimize variation in the entire number of ions in the intermediate layer involved in operation of the switching atomic transistor or to eliminate the variation to maintain stable operation of the switching atomic transistor. In addition, it is possible to stably implement a multi-level cell of a switching atomic transistor capable of storing more information without increasing the number of memory cells. Also, disclosed are a vertical atomic transistor with a diffusion barrier layer and a method of operating the same. By producing an ion channel layer in a vertical structure, it is possible to significantly increase transistor integration.
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公开(公告)号:US20180122910A1
公开(公告)日:2018-05-03
申请号:US15464536
申请日:2017-03-21
发明人: Chang-Beom Eom , Daesu Lee
IPC分类号: H01L29/24 , H03K17/687 , H01L21/02 , H01L29/10 , H01L29/66 , H01L29/78 , H01L45/00 , H03K17/51
CPC分类号: H01L29/24 , H01L21/02414 , H01L21/02483 , H01L21/02488 , H01L21/02513 , H01L21/02565 , H01L21/02631 , H01L29/1033 , H01L29/1079 , H01L29/66969 , H01L29/78 , H01L29/7869 , H01L45/065 , H01L45/1206 , H01L45/146 , H03K17/04 , H03K17/51 , H03K17/687
摘要: Layers of high quality VO2 and methods of fabricating the layers of VO2 are provided. The layers are composed of a plurality of connected crystalline VO2 domains having the same crystal structure and the same epitaxial orientation.
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公开(公告)号:US20180061888A1
公开(公告)日:2018-03-01
申请号:US15246161
申请日:2016-08-24
申请人: Euipil KWON
发明人: Euipil KWON
IPC分类号: H01L27/24 , H01L29/872 , H01L27/06 , H01L27/22
CPC分类号: H01L45/122 , H01L27/0629 , H01L27/224 , H01L27/226 , H01L27/2409 , H01L27/2427 , H01L27/2445 , H01L29/872 , H01L45/06 , H01L45/12 , H01L45/1206 , H01L45/1226 , H01L45/1233 , H01L45/1246
摘要: The nonvolatile memory device includes a semiconductor substrate, a first and a second diffusion regions formed under a surface of the semiconductor substrate, a storage layer formed on the semiconductor substrate, a gate stacked on the storage layer, wherein the first diffusion region may at least one of active regions being separated by a part of the semiconductor substrate forming a channel region., wherein the second diffusion region may include an active region intersecting the gate insulating layer, wherein the storage layer may include an insulating layer or a variable resistor, and may service as a data storage layer to store data, and may be selected by a structure including the first and the second diffusion regions.
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公开(公告)号:US09882016B2
公开(公告)日:2018-01-30
申请号:US15411886
申请日:2017-01-20
IPC分类号: H01L29/51 , H01L29/08 , H01L29/10 , H01L29/40 , H01L29/423 , H01L29/78 , H01L27/1159 , H01L27/108
CPC分类号: H01L29/516 , G11C14/0027 , H01L21/28291 , H01L27/10823 , H01L27/10876 , H01L27/11585 , H01L27/1159 , H01L29/0847 , H01L29/1037 , H01L29/408 , H01L29/4236 , H01L29/42364 , H01L29/42368 , H01L29/511 , H01L29/513 , H01L29/518 , H01L29/6684 , H01L29/7827 , H01L29/78391 , H01L29/784 , H01L45/1206 , H01L45/1233 , H01L45/14
摘要: Some embodiments include a semiconductor construction having a gate extending into a semiconductor base. Conductively-doped source and drain regions are within the base adjacent the gate. A gate dielectric has a first segment between the source region and the gate, a second segment between the drain region and the gate, and a third segment between the first and second segments. At least a portion of the gate dielectric comprises ferroelectric material. In some embodiments the ferroelectric material is within each of the first, second and third segments. In some embodiments, the ferroelectric material is within the first segment or the third segment. In some embodiments, a transistor has a gate, a source region and a drain region; and has a channel region between the source and drain regions. The transistor has a gate dielectric which contains ferroelectric material between the source region and the gate.
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公开(公告)号:US20170365641A1
公开(公告)日:2017-12-21
申请号:US15184838
申请日:2016-06-16
发明人: Daniel BEDAU
CPC分类号: H01L27/2436 , H01L27/2454 , H01L27/2463 , H01L29/685 , H01L45/04 , H01L45/1206 , H01L45/1226 , H01L45/1253 , H01L45/146
摘要: A three terminal ReRAM device, which combines a Schottky barrier transistor and a Schottky barrier ReRAM into a single device is provided. The Schottky transistor memory device includes a source region, a drain region, and a gate electrode. Between the source and drain regions, the ReRAM material is present. The ReRAM material can include a metal oxide, such as zinc or hafnium oxide. A Schottky barrier forms naturally between the drain region and the ReRAM material. As voltage is applied to the gate electrode and the source region, the Schottky barrier breaks down, leading to the formation of a filament across the drain region and the ReRAM material. The filament is non-volatile and short-circuits the reverse-biased barrier, keeping the device in a low resistance state. The filament can be removed by reversing the polarity of the voltage such that the device switches back to a high resistance state.
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7.
公开(公告)号:USRE46636E1
公开(公告)日:2017-12-12
申请号:US14836418
申请日:2015-08-26
申请人: Sony Corporation
发明人: Jun Sumino , Motonari Honda
CPC分类号: H01L45/1246 , H01L27/228 , H01L27/2436 , H01L27/2472 , H01L43/08 , H01L43/10 , H01L45/06 , H01L45/085 , H01L45/1206 , H01L45/122 , H01L45/1226 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1683
摘要: A nonvolatile memory device group includes: (A) a first insulating layer; (B) a second insulating layer that has a first concavity and a second concavity communicating with the first concavity and having a width larger than that of the first concavity and that is disposed on the first insulating layer; (C) a plurality of electrodes that are disposed in the first insulating layer and the top surface of which is exposed from the bottom surface of the first concavity; (D) an information storage layer that is formed on the side walls and the bottom surfaces of the first concavity and the second concavity; and (E) a conductive material layer that is filled in a space surrounded with the information storage layer in the second concavity.
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公开(公告)号:US20170338281A1
公开(公告)日:2017-11-23
申请号:US15162332
申请日:2016-05-23
发明人: Daniel Bedau
IPC分类号: H01L27/24 , H01L23/528 , H01L45/00
CPC分类号: H01L27/2463 , H01L23/528 , H01L45/08 , H01L45/1206 , H01L45/1226 , H01L45/146 , H01L45/147 , H01L45/1608
摘要: To provide enhanced data storage devices and systems, various systems, architectures, apparatuses, and methods, are provided herein. In a first example, a resistive memory device is provided. The resistive memory device comprises a substrate, and an active region having resistance properties that can be modified to store one or more data bits, the active region comprising region of the substrate with a chemically altered reduction level to establish a resistive memory property in the substrate. The resistive memory device comprises terminals formed into the substrate and configured to couple the active region to associated electrical contacts.
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公开(公告)号:US09825221B2
公开(公告)日:2017-11-21
申请号:US15019553
申请日:2016-02-09
发明人: Fujio Masuoka , Hiroki Nakamura
IPC分类号: H01L31/119 , H01L29/06 , H01L21/00 , H01L45/00 , H01L27/24
CPC分类号: H01L45/06 , H01L27/2454 , H01L27/2463 , H01L45/065 , H01L45/1206 , H01L45/1233 , H01L45/1253 , H01L45/126 , H01L45/1286 , H01L45/144 , H01L45/16 , H01L45/1608 , H01L45/1675
摘要: A memory device includes a reset gate whose resistance changes. The memory device also includes a pillar-shaped phase-change layer, a reset gate insulating film surrounding the pillar-shaped phase-change layer, and the reset gate surrounding the reset gate insulating film. The pillar-shaped phase-change layer and the reset gate are electrically insulated from each other by the reset gate insulating film.
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公开(公告)号:US20170317277A1
公开(公告)日:2017-11-02
申请号:US15653210
申请日:2017-07-18
发明人: R. Stanley Williams
CPC分类号: H01L45/08 , G11C13/0007 , G11C13/0009 , G11C2213/52 , G11C2213/53 , G11C2213/56 , G11C2213/77 , H01L27/2463 , H01L45/1206 , H01L45/1233 , H01L45/14 , H01L45/145 , H01L45/146 , H01L45/147 , H03K17/00
摘要: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.
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