METHODS AND APPARATUSES FOR OPERATING ANALOG-TO-DIGITAL CONVERTERS IN AN ULTRASOUND DEVICE WITH TIMING DELAYS

    公开(公告)号:US20210167791A1

    公开(公告)日:2021-06-03

    申请号:US17109946

    申请日:2020-12-02

    Abstract: Aspects of the technology described herein relate to an ultrasound device having a first analog-to-digital converter (ADC) configured to operate with a first ADC clock signal having a first timing delay and a second ADC configured to operate with a second ADC clock signal having a second timing delay. The first timing delay and the second timing delay may be different. The ultrasound device may further include delay control circuitry configured to control direct digital synthesis (DDS) circuitry to implement a first delay in ultrasound data from the first ADC and a second delay in ultrasound data from the second ADC. The first delay may correct for the first timing delay and the second delay may correct for the second timing delay.

    Methods and apparatuses for packaging an ultrasound-on-a-chip

    公开(公告)号:US11018068B2

    公开(公告)日:2021-05-25

    申请号:US16502553

    申请日:2019-07-03

    Abstract: Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

    VERTICAL PACKAGING FOR ULTRASOUND-ON-A-CHIP AND RELATED METHODS

    公开(公告)号:US20210113188A1

    公开(公告)日:2021-04-22

    申请号:US17088336

    申请日:2020-11-03

    Abstract: Vertical packaging configurations for ultrasound chips are described. Vertical packaging may involve use of integrated interconnects other than wires for wire bonding. Examples of such integrated interconnects include edge-contact vias, through silicon vias and conductive pillars. Edge-contact vias are vias defined in a trench formed in the ultrasound chip. Multiple vias may be provided for each trench, thus increasing the density of vias. Such vias enable electric access to the ultrasound transducers. Through silicon vias are formed through the silicon handle and provide access from the bottom surface of the ultrasound chip. Conductive pillars, including copper pillars, are disposed around the perimeter of an ultrasound chip and provide access to the ultrasound transducers from the top surface of the chip. Use of these types of packaging techniques can enable a substantial reduction in the dimensions of an ultrasound device.

    METHODS AND APPARATUSES FOR ANALYZING IMAGING DATA

    公开(公告)号:US20200372657A1

    公开(公告)日:2020-11-26

    申请号:US16880272

    申请日:2020-05-21

    Abstract: Aspects of the technology described herein relate to automatically calculating and displaying a prediction of a collective opinion of a group of individuals regarding imaging data and/or an output based on the imaging data. In some embodiments, the prediction may be a prediction of the collective opinion of a group of individuals regarding the usability of imaging data, regarding a segmentation of an image, or regarding a measurement performed based on the imaging data.

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