公开(公告)号：US06969647B2

公开(公告)日：2005-11-29

申请号：US10963231

申请日：2004-10-12

Applicant: Alan Devoe ,  Lambert Devoe ,  Hung Trinh

Inventor： Alan Devoe ,  Lambert Devoe ,  Hung Trinh

IPC: H01G4/005 ,  H01G4/06 ,  H01G4/12 ,  H01G4/228 ,  H01G4/33 ,  H01L21/02 ,  H01L21/8242

CPC classification number: H01G4/005 ,  H01G4/06 ,  H01G4/228 ,  H01G4/33

Abstract: A method of making a monolithic or essentially monolithic single layer capacitor with high structural strength and capacitance. Sheets of green-state ceramic dielectric material and ceramic/metal composite material are laminated together, diced into individual chips, and fired to sinter the ceramic together. The composite material may contain an amount of metal sufficient to render the composite conductive whereby the composite may be used for one or both electrodes and for mounting the capacitor to the pc board. Alternatively, the composite material may contain an amount of metal insufficient to render the composite conductive but sufficient to act as seed points for an electroplating process wherein the composite is preferentially coated with conductive metal, and the coated composite is mounted to the pc board and the coating provides an electrical connection to an internal electrode. Vertically-oriented surface mountable capacitors and hybrid capacitors are provided.

Abstract translation: 制造具有高结构强度和电容的单片或基本单片单层电容器的方法。 将绿色陶瓷电介质材料和陶瓷/金属复合材料片层压在一起，切割成单个芯片，并烧结以将陶瓷烧结在一起。 复合材料可以包含足以使复合材料导电的金属量，由此复合材料可以用于一个或两个电极，并将电容器安装到印刷电路板上。 或者，复合材料可以含有不足以使复合材料导电但足以用作电镀工艺的种子点的金属量，其中复合材料优先涂覆有导电金属，并且涂覆的复合材料安装到印刷电路板和 涂层提供与内部电极的电连接。 提供垂直取向的表面贴装电容器和混合电容器。

公开(公告)号：US06587327B1

公开(公告)日：2003-07-01

申请号：US10150202

申请日：2002-05-17

Applicant: Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

Inventor： Daniel Devoe ,  Alan Devoe ,  Lambert Devoe

IPC: H01G4228

CPC classification number: H01G4/30 ,  H01G4/228 ,  H01G4/38

Abstract: A monolithic capacitor structure includes at least first and second plates internal to a dielectric body, the plates extending inward from opposed conductive contacts on surfaces of the body, and forming capacitor(s) therebetween. A third plate extends within said body, electrically floating relative to the exterior contacts, and forming a capacitor with the first and second plates, and further forming a capacitor with additional conductive structures connected to the conductive contacts on the body. The resulting array of combined series and parallel capacitors formed by the third plate, in conjunction with the capacitor(s) formed by the first and second plates, provides effective wideband performance in an integrated, cost-effective structure.

Abstract translation: 单片电容器结构至少包括介电体内部的第一和第二板，所述板从主体表面上的相对的导电触点向内延伸，并且在它们之间形成电容器。 第三板在所述主体内延伸，相对于外部触头电浮动，以及与第一和第二板形成电容器，并进一步形成具有连接到主体上的导电触点的附加导电结构的电容器。 由第三板形成的所组合的串联和并联电容器阵列与由第一和第二板形成的电容器相结合，在集成的，具有成本效益的结构中提供了有效的宽带性能。

公开(公告)号：US06366443B1

公开(公告)日：2002-04-02

申请号：US08987463

申请日：1997-12-09

Applicant: Daniel Devoe ,  Alan D. Devoe ,  Lambert Devoe

Inventor： Daniel Devoe ,  Alan D. Devoe ,  Lambert Devoe

IPC: H01G406

CPC classification number: H01G4/232 ,  H01G4/228 ,  H05K1/0306 ,  H05K1/162

Abstract: A ceramic capacitor typically 10 mils to 340 mils square by typically 4-20 mils thickness with areas of metallization, or pads, to which electrical connections may be made on, typically, each of two opposite exterior surfaces, has embedded at least one, and normally two or more, metallization planes at close, typically 0.5 mil, separation. Each interior metallization plane connects through multiple redundant vias, as are preferably made by (ii) punching, (ii) drilling, (iii) laser drilling, or (iv) radiation patterning of a green ceramic sheet having a photosensitive binder, to an associated surface pad or trace. The vias are both numerous and redundant, typically being of 2 mil diameter on 10 mil centers in a pin grid array pattern over and through entire ceramic layers of the capacitor, permitting both (i) easy fabrication without exacting alignment or registration between layers, and (ii) low Equivalent Series Resistance (ESR) in the finished capacitor. The composite structure so created exhibits increased capacitance over that which would alternatively exist should no electrically-connected interior metallization planes be present.

Abstract translation: 陶瓷电容器通常为10密耳至340密耳平方，通常为4-20密耳厚度，具有金属化或焊盘的区域，电连接可以通常形成在两个相对的外表面上，每个都具有至少一个和 通常为两个或更多个金属化平面，接近，通常为0.5密耳，分离。 每个内部金属化平面通过多个冗余通孔连接，优选通过以下方式制成：（i）冲孔，（ii）钻孔，（iii）激光钻孔，或（iv）具有感光性粘合剂的生坯陶瓷片的辐射图案化， 表面垫或痕迹。 通孔是众多的和冗余的，通常在10密耳中心上的2密耳直径，在电容器的整个陶瓷层上方并且穿过电容器的整个陶瓷层，允许（i）易于制造而不精确对准或层之间的配准，以及 （ii）成品电容器中的低等效串联电阻（ESR）。 如此制造的复合结构表现出增加的电容，如果不存在电连接的内部金属化平面，则可能存在电容。 ...不再需要最大限度地实现最佳电容，外部焊盘尺寸适中，位置优越，优选从电容器的边缘取出，以防止环氧树脂粘合剂的芯吸，从而允许四舍五入 电容器的边缘为了抑制切屑。 尽管如此，尺寸较小的焊盘仍然比通过冗余地电连接到每个焊盘的多个通孔大得多，并且通常通过阴燃而容易可靠地电连接。

公开(公告)号：US06917509B1

公开(公告)日：2005-07-12

申请号：US10301335

申请日：2002-11-21

Applicant: Daniel F. Devoe ,  Lambert Devoe ,  Alan D. Devoe

Inventor： Daniel F. Devoe ,  Lambert Devoe ,  Alan D. Devoe

IPC: H01G2/06 ,  H01G4/228 ,  H05K3/32 ,  H05K3/34 ,  H01G4/008 ,  H01G4/06

CPC classification number: H01G4/228 ,  H01G2/065 ,  H01L2224/48091 ,  H01L2924/19107 ,  H05K3/328 ,  H05K3/341 ,  H05K2201/10643 ,  H05K2201/10659 ,  H05K2201/10909 ,  H05K2203/049 ,  H01L2924/00014

Abstract: A single layer ceramic capacitor for wire bonding or solder or epoxy attachment wherein a bottom metallization is of a lesser purity than a top metallization whereby the bottom metallization may be effectively soldered without leaching of the metal and the top metallization may be wire bonded. In an exemplary embodiment, the top metallization is essentially pure gold and the bottom metallization is an alloy of gold and platinum and/or palladium. The top and bottom metallizations are provided on a dielectric body that advantageously comprises a ceramic having a sintering temperature below the melting point of gold. In a further exemplary embodiment, the capacitance of the capacitor may be enhanced by providing one or more interior metallization planes parallel to the exterior metallizations and connected thereto by conductive vias.

Abstract translation: 用于引线接合或焊料或环氧树脂附着的单层陶瓷电容器，其中底部金属化的纯度比顶部金属化的纯度低，由此底部金属化可以有效地焊接而不会浸出金属，并且顶部金属化可以是引线键合的。 在示例性实施例中，顶部金属化基本上是纯金，底部金属化是金和铂和/或钯的合金。 顶部和底部金属化物提供在电介质体上，其有利地包括具有低于金熔点的烧结温度的陶瓷。 在另一示例性实施例中，可以通过提供一个或多个内部金属化平面平行于外部金属化并通过导电通孔与其连接的电容来增强电容器的电容。