公开(公告)号：US06553533B2

公开(公告)日：2003-04-22

申请号：US09245803

申请日：1999-02-05

Applicant: Masayuki Demura ,  Hironobu Nagura ,  Tetsuya Tamura ,  Keisuke Tanaka

Inventor： Masayuki Demura ,  Hironobu Nagura ,  Tetsuya Tamura ,  Keisuke Tanaka

IPC: G11C2900

CPC classification number: G06F11/1008 ,  G11B20/10 ,  G11B20/18 ,  H03M13/1515 ,  H03M13/29 ,  H03M13/2909 ,  H03M13/293

Abstract: A method and apparatus for detecting and correcting errors and erasures in product-coded data arrays by iterative syndrome processing array data in row major order and column major order. A first dense map is formed for classifying each row containing location indicia of random errors, their correction patterns, and pointers to rows containing erasure errors. This map is used to effectuate row array random error corrections in place in memory. A second dense map is formed of location indicia and correction patterns for each pair adjacent position within a column containing erasure errors as indexed by a counterpart row pointer. The second map is used to effectuate column array erasure corrections and random error corrections in place in memory.

Abstract translation: 一种检测和校正产品编码数据阵列中的错误和消除误差的方法和装置，通过迭代校正处理阵列数据以行主序和列主序列。 形成第一密集地图，用于将包含随机错误的位置标记，它们的校正模式和指向包含擦除错误的行的指针的每行分类。 该映射用于在存储器中实现行阵列随机误差校正。 第二密集地图由位置标记和校正图案形成，每个对相邻位置在包含由对应行指针索引的擦除错误的列内。 第二个映射用于在存储器中实现列阵列擦除校正和随机错误校正。

公开(公告)号：US06348883B2

公开(公告)日：2002-02-19

申请号：US09791280

申请日：2001-02-21

Applicant: Takenori Okada ,  Keisuke Tanaka ,  Teruhiko Ushio

Inventor： Takenori Okada ,  Keisuke Tanaka ,  Teruhiko Ushio

IPC: H03M700

CPC classification number: H03M7/46 ,  G11B20/1426 ,  G11B2020/1461

Abstract: A method and apparatus are described which demodulate channel bits modulated by an arbitrary one of two modulation schemes, by making use of a consolidated reference table with a small address space. The method of the invention comprises the steps of: generating first output bits for representing patterns that correspond to patterns represented by first channel bits other than those patterns being unable to exist under first RLL constraints, the first output bits having a lesser number of bits than the first channel bits; and generating second output bits for representing patterns that correspond to patterns represented by second channel bits other than those patterns being unable to exist under second RLL constraints, the patterns represented by the second output bits being located at discontinuous areas of the patterns represented by the first output bits, the second output bits having a lesser number of bits than the second channel bits. The first and second output bits are used for designating an address of a demodulating reference table.

公开(公告)号：US6148172A

公开(公告)日：2000-11-14

申请号：US406378

申请日：1999-09-27

Applicant: Takanori Kanda ,  Akira Kosugi ,  Keisuke Tanaka ,  Daisuke Ueda ,  Akitoshi Matsubara ,  Minoru Asakawa ,  Jun Yokobori ,  Chikatsu Suzuki ,  Takaaki Sakai ,  Junji Sato ,  Yoshinao Kitahara

Inventor： Takanori Kanda ,  Akira Kosugi ,  Keisuke Tanaka ,  Daisuke Ueda ,  Akitoshi Matsubara ,  Minoru Asakawa ,  Jun Yokobori ,  Chikatsu Suzuki ,  Takaaki Sakai ,  Junji Sato ,  Yoshinao Kitahara

IPC: B65H3/44 ,  B65H5/34 ,  B65H9/10 ,  G03G15/00

CPC classification number: B65H9/006 ,  B65H3/44 ,  B65H5/34 ,  B65H9/106 ,  G03G15/6529 ,  G03G15/6564 ,  G03G15/6567 ,  B65H2404/7231 ,  B65H2511/22 ,  G03G2215/00447 ,  G03G2215/00556

Abstract: An image forming apparatus is provided with a plurality of storing units for storing respective recording materials of various sizes; a plurality of feeding members for feeding out the recording materials from each of the storing units; a conveyance path along which the recording materials being fed out by each of the feeding members are conveyed; a plurality of conveying members for conveying the recording materials along the conveyance path; an image forming section for forming an image on the recording materials conveyed along the conveyance path; and a plurality of first regulators provided at respective predetermined positions with respect to corresponding ones of each of the storing units for regulating at least a maximum size of the various sizes of the recording materials while at least at a part of each of the recording materials is fed out from the respective corresponding storing units.

Abstract translation: 图像形成装置设置有用于存储各种尺寸的各种记录材料的多个存储单元; 多个进给构件，用于从每个存储单元输出记录材料; 传送通过每个馈送部件馈送的记录材料的传送路径; 多个传送构件，用于沿着传送路径传送记录材料; 图像形成部，用于在沿着传送路径传送的记录材料上形成图像; 以及多个第一调节器，其相对于每个存储单元中的相应的预定位置设置，用于至少在每个记录材料的一部分处调节记录材料的各种尺寸的至少最大尺寸， 从相应的相应的存储单元馈送。

公开(公告)号：US5445908A

公开(公告)日：1995-08-29

申请号：US958717

申请日：1992-10-09

Applicant: Koichi Inoue ,  Kazutoshi Okubo ,  Kohei Kitagawa ,  Keisuke Tanaka ,  Tomoya Watanabe

Inventor： Koichi Inoue ,  Kazutoshi Okubo ,  Kohei Kitagawa ,  Keisuke Tanaka ,  Tomoya Watanabe

IPC: H01M4/66 ,  H01M4/82

CPC classification number: H01M4/661 ,  H01M4/82

Abstract: The present invention provides an alkaline dry cell which has a negative electrode comprising zinc alloy powders free of mercury as a negative electrode active material and provided in the center portion of the cell, a positive electrode provided around the outer surface of the negative electrode with a separator provided therebetween and a current collector comprising copper or a copper alloy and inserted in the negative electrode and which is inhibited from generation of hydrogen gas and from leakage of liquid. This alkaline dry cell is characterized in that the surface of the current collector is plated with a metal of high hydrogen overvoltage such as tin, lead, copper, zinc or an alloy of two or more of these metals.

Abstract translation: 本发明提供一种碱性干电池，其具有含有不含汞的锌合金粉末作为负极活性物质并设置在电池的中心部分的负极，设置在负极的外表面周围的正电极， 设置在它们之间的隔板和包含铜或铜合金的集电体，并且插入在负电极中，并且抑制氢气的产生和液体的泄漏。 该碱性干电池的特征在于，集电体的表面镀有高的氢过电压金属，例如锡，铅，铜，锌或两种或更多种这些金属的合金。