公开(公告)号：US20040032756A1

公开(公告)日：2004-02-19

申请号：US10387119

申请日：2003-03-12

Applicant: STMicroelectronics N.V.

Inventor： Luc Jozef Louis Van Den Bossche

IPC: H02M007/00

CPC classification number: H02M7/219 ,  H02M7/217

Abstract: AC/DC converters comprise rectifiers for rectifying AC signals into DC signals. By providing these AC/DC converters with voltage dividing capacitors located between converter-input, a resistor, added to voltage dividing capacitor for filtering peak signals, and a rectifier, the rectifier can be better integrated, as it no longer receives the entire input voltage present at the converter-input of the AC/DC converter, without a conventional transformer comprising an iron core and windings being required. Such an AC/DC-converter is small sized, of light-weight and low costly made. Preferably, the converter-input is symmetric, the rectifier comprises two diodes and two transistors and a zero-cross detector for switching the transistors, the AC/DC converter comprises a down-converter located between the rectifier and converter-output for further down-converting purposes and comprising an inductor and a regulator for regulating inductor/capacitor-energies, with buffer capacitors being present in parallel to the down-converter for stabilising purposes, to get a transformerless wall plug adapter.

Abstract translation: AC / DC转换器包括用于将AC信号整流为DC信号的整流器。 通过为这些AC / DC转换器提供位于转换器输入端之间的分压电容器，添加到用于滤波峰值信号的分压电容器的电阻器和整流器，整流器可以更好地集成，因为它不再接收整个输入电压 存在于AC / DC转换器的转换器输入端，而不需要包括铁芯的常规变压器和绕组。 这种AC / DC转换器体积小巧，重量轻，成本低廉。 优选地，转换器输入是对称的，整流器包括两个二极管和两个晶体管和用于切换晶体管的零交叉检测器，AC / DC转换器包括位于整流器和转换器输出之间的下变频器， 转换目的，并且包括用于调节电感器/电容器能量的电感器和调节器，其中缓冲电容器与下变频器​​并联存在用于稳定目的，以获得无变压器壁插头适配器。

公开(公告)号：US20030151395A1

公开(公告)日：2003-08-14

申请号：US10325476

申请日：2002-12-18

Applicant: STMICROELECTRONICS N.V.

Inventor： Koen Emiel Jozef Appeltans ,  Christian Bruno Gislain Binard

IPC: G05F001/40

CPC classification number: H02M3/156

Abstract: The invention relates to a DC/DC converter or power supply with a switched-mode regulator (2), said regulator (2) being provided or associated to a feedback comparator (1) of a feedback voltage (Vact) for improving the stability of the output signal. It is further provided or associated to a means (3, D) for adding an offset voltage (Voff) to the feedback voltage (Vact) during at least one phase (null1) of the switched-mode regulator (2) or at least a portion thereof.

Abstract translation: 本发明涉及具有开关模式调节器（2）的DC / DC转换器或电源，所述调节器（2）被提供或与反馈电压（Vact）的反馈比较器（1）相关联，用于提高稳定性 输出信号。 进一步提供或关联于用于在开关模式调节器（2）的至少一个相位（phi1）期间向反馈电压（Vact）增加偏移电压（Voff）的装置（3，D）或至少一个 部分。

公开(公告)号：US20030058963A1

公开(公告)日：2003-03-27

申请号：US10255741

申请日：2002-09-26

Applicant: STMicroelectronics N.V.

Inventor： Chiara Cattaneo ,  Didier Helal ,  Thierry Arnaud ,  Fritz Lebowsky ,  Regis Cattenoz

IPC: H03K009/00

CPC classification number: H04B1/7183 ,  H04B1/71637

Abstract: An incident pulse signal of the ultra wideband type conveys digital information that is coded using pulses having a known theoretical shape. A decoding device includes an input for receiving the incident signal, and for delivering a base signal. A comparator receives the base signal and delivers an intermediate signal representative of the sign of the base signal with respect to a reference. A sampling circuit samples the intermediate signal for delivering a digital signal. A digital processing circuit correlates the digital signal with a reference correlation signal corresponding to a theoretical base signal arising from the reception of a theoretical pulse having the known theoretical shape.

Abstract translation: 超宽带类型的入射脉冲信号传送使用具有已知理论形状的脉冲编码的数字信息。 解码装置包括用于接收入射信号和用于传送基本信号的输入。 比较器接收基本信号并传送表示基准信号相对于参考的符号的中间信号。 采样电路对传送数字信号的中间信号进行采样。 数字处理电路将数字信号与对应于从具有已知理论形状的理论脉冲的接收产生的理论基础信号相对应的参考相关信号。

公开(公告)号：US6088186A

公开(公告)日：2000-07-11

申请号：US960181

申请日：1997-10-29

Applicant: Lance Robert Carlson

Inventor： Lance Robert Carlson

IPC: G11B5/55 ,  G11B5/596 ,  G11B7/09 ,  G11B7/095 ,  G11B21/10

CPC classification number: G11B21/106 ,  G11B5/5547 ,  G11B5/59627 ,  G11B5/5534 ,  G11B5/59605 ,  G11B5/59622 ,  G11B7/0941 ,  G11B7/0953

Abstract: The invention is a servo compensation method and system for use in a disk storage system. The disk storage system experiences error that causes a head to become mis-aligned with the disk. The error comprises run-out error and other servo position errors. During follow mode, a digital filter processes a position error signal to generate a compensation signal. The position error signal is comprised of components representative of the run-out error and the other servo position errors. The compensation signal is comprised of components that cause the servo positioning system to compensate for the run-out error and the other servo position errors. The digital filter also operates as an oscillator that provides an oscillating signal the spin frequency of the disk during seek mode.

Abstract translation: 本发明是一种用于磁盘存储系统的伺服补偿方法和系统。 磁盘存储系统遇到导致磁头与磁盘错误对齐的错误。 误差包括跳动误差和其他伺服位置误差。 在跟随模式期间，数字滤波器处理位置误差信号以产生补偿信号。 位置误差信号由代表偏移误差和其他伺服位置误差的分量组成。 补偿信号包括使伺服定位系统补偿偏移误差和其他伺服位置误差的部件。 数字滤波器还作为振荡器工作，在寻道模式下提供振荡信号的磁盘自旋频率。

公开(公告)号：US5995543A

公开(公告)日：1999-11-30

申请号：US885978

申请日：1997-06-30

Applicant: Janos Kovacs ,  Jack Kenney

Inventor： Janos Kovacs ,  Jack Kenney

IPC: G11B20/10 ,  H04L25/03 ,  H03D1/00

CPC classification number: G11B20/10046 ,  G11B20/10009 ,  H04L25/03203

Abstract: A constrained fixed delay tree search receiver for an MTR=2 encoded communication channel includes a filter circuit responsive to a received signal for producing a channel impulse response including a plurality of filtered samples with at least one of the post cursor filter samples forced to zero; a feedback equalizer circuit responsive to the channel symbol identified at the output of the receiver and the filtered samples for producing corresponding truncated samples comprised of linear combinations of coefficients characterizing the channel and channel symbols constrained by the MTR=2 code; and a detector including a discrete time filter responsive to the truncated samples for generating a set of signals defining a multi-segment boundary which divides the combination of the set of signals into two groups; a comparator circuit responsive to the discrete time filter for determining to which of the groups the combination of the set of signals belongs, and a logic circuit, responsive to the comparator circuit, for determining the value of a channel symbol as a function of the group in which the set of symbols belongs.

Abstract translation: 用于MTR = 2编码通信信道的约束固定延迟树搜索接收机包括响应于接收信号的滤波器电路，用于产生包括多个经滤波样本的信道脉冲响应，其中至少一个后光标滤波器样本被强制为零; 响应于在接收机的输出处识别的信道符号的反馈均衡器电路和用于产生由表征由信道和由MTR = 2码限制的信道符号的系数的线性组合组成的相应截断样本的滤波样本; 以及检测器，其包括响应于所述截断样本的离散时间滤波器，用于生成限定将所述一组信号的组合分成两组的多段边界的一组信号; 响应于离散时间滤波器的比较器电路，用于确定属于该组信号的组合的组中的哪个组以及响应于比较器电路的用于确定作为组的函数的信道符号的值的逻辑电路 其中符号集合属于其中。

公开(公告)号：US08789165B2

公开(公告)日：2014-07-22

申请号：US13027834

申请日：2011-02-15

Applicant: Marco Bildgen ,  Jean Devin

Inventor： Marco Bildgen ,  Jean Devin

IPC: G06F21/00 ,  H04L29/06 ,  H04N7/167 ,  H04N7/20 ,  G06F15/16 ,  H04B1/16 ,  H04M11/00

CPC classification number: H04N7/1675 ,  G06F21/10 ,  G06F21/552 ,  G06F21/77 ,  G06F2221/0797 ,  G06F2221/2105 ,  G06F2221/2151 ,  G06F2221/2153 ,  H04L9/004 ,  H04L9/0637 ,  H04L63/1441 ,  H04N21/4181 ,  H04N21/4424 ,  H04N21/4432 ,  H04N21/4623

Abstract: A method may be for detecting potentially suspicious operation of an electronic device configured to operate in the course of activity sessions. The method may include within the device, a metering, from an initial instant of the number of activity sessions having a duration below a first threshold, and a comparison of this number with a second threshold.

Abstract translation: 一种方法可以用于检测被配置为在活动会话过程中操作的电子设备的潜在的可疑操作。 所述方法可以在所述设备内包括从具有低于第一阈值的持续时间的活动会话的数量的初始时刻的计量，以及所述数量与第二阈值的比较。

公开(公告)号：US08745407B2

公开(公告)日：2014-06-03

申请号：US11912936

申请日：2006-05-02

Applicant: Francesco Varone ,  Pasquale Vastano ,  Amedeo Veneroso

Inventor： Francesco Varone ,  Pasquale Vastano ,  Amedeo Veneroso

IPC: G06F12/14

CPC classification number: G06F21/123

Abstract: A virtual machine or hardware processor for an IC-card portable electronic device includes a non-volatile memory unit, a remote decryption unit, and associated objects for storing an executable program in an encrypted format in the non-volatile memory. The IC-card stores a licence key to encrypt and decrypt the executable program through an IC-card interface. The IC-card interface extracts and encrypts the operands of the plain executable program into encrypted operands so as to not limit performance. The remote decryption unit detects if an instruction contains encrypted operands, and queries a decryption to the IC-card interface. The IC-card interface decrypts the encrypted operands and re-encrypts the just decrypted operands into obscured operands through a dynamic obscuration key.

Abstract translation: 用于IC卡便携式电子设备的虚拟机或硬件处理器包括非易失性存储器单元，远程解密单元和用于在非易失性存储器中以加密格式存储可执行程序的相关对象。 IC卡存储许可证密钥，以通过IC卡接口对可执行程序进行加密和解密。 IC卡接口将普通可执行程序的操作数提取并加密为加密操作数，以便不会限制性能。 远程解密单元检测指令是否包含加密操作数，并向IC卡接口查询解密。 IC卡接口解密加密的操作数，并通过动态遮蔽键将刚解密的操作数重新加密成模糊的操作数。

公开(公告)号：US08598620B2

公开(公告)日：2013-12-03

申请号：US12431580

申请日：2009-04-28

Applicant: Alexei Ankoudinov ,  Vladimir Rodov ,  Richard Cordell

Inventor： Alexei Ankoudinov ,  Vladimir Rodov ,  Richard Cordell

IPC: H01L29/66 ,  H01L29/74

CPC classification number: H01L29/861 ,  H01L29/0878 ,  H01L29/41766 ,  H01L29/7802

Abstract: A modified MOSFET structure comprises an integrated field effect rectifier connected between the source and drain of the MOSFET to shunt current during switching of the MOSFET. The integrated FER provides faster switching of the MOSFET due to the absence of injected carriers during switching while also decreasing the level of EMI relative to discrete solutions. The integrated structure of the MOSFET and FER can be fabricated using N-, multi-epitaxial and supertrench technologies, including 0.25 μm technology. Self-aligned processing can be used.

Abstract translation: 改进的MOSFET结构包括连接在MOSFET的源极和漏极之间的集成场效应整流器，以在MOSFET的开关期间分流电流。 由于在开关期间不存在注入的载流子，集成的FER提供了MOSFET更快的切换，同时也降低了相对于离散解决方案的EMI水平。 MOSFET和FER的集成结构可以使用包括0.25mum技术的N，多外延和超级技术来制造。 可以使用自对准处理。

公开(公告)号：US08457239B2

公开(公告)日：2013-06-04

申请号：US12445614

申请日：2007-10-15

Applicant: Friedbert Berens ,  Andreas Rüegg

Inventor： Friedbert Berens ,  Andreas Rüegg

IPC: H04B15/00

CPC classification number: H04W52/242 ,  H04B1/719 ,  H04L27/2601 ,  H04W52/10 ,  H04W52/246

Abstract: The method is for managing operation of a first apparatus belonging to a first communication system and exchanging within the first communication system a multi-carrier modulated signal on several sub-carriers. The method includes detecting at the first apparatus the presence of an interfering signal emitted from a victim apparatus on a sub-carrier. The method may also include determining at the first apparatus the path loss between both apparatuses, determining from the path loss and from an allowed interference level at the victim apparatus a maximum allowed transmit power on the sub-carrier of a multi-carrier modulated signal to be transmitted from the first apparatus, and adjusting within the first apparatus the processing of the multi-carrier modulated signal to be transmitted in accordance with the maximum allowed transmit power.

Abstract translation: 该方法用于管理属于第一通信系统的第一装置的操作，并且在第一通信系统内交换多个载波上的多载波调制信号。 该方法包括在第一设备处检测在子载波上从受害设备发射的干扰信号的存在。 该方法还可以包括在第一设备处确定两个设备之间的路径损耗，从路径损耗和受害设备处的允许的干扰电平确定多载波调制信号的子载波上的最大允许发射功率到 从第一装置发送，并且根据最大允许发送功率在第一装置内调整要发送的多载波调制信号的处理。

公开(公告)号：US08451946B2

公开(公告)日：2013-05-28

申请号：US11813244

申请日：2005-12-14

Applicant: Gian Mario Maggio ,  Chiara Cattaneo ,  Philippe Rouzet

Inventor： Gian Mario Maggio ,  Chiara Cattaneo ,  Philippe Rouzet

IPC: H03K9/00

CPC classification number: H04B1/71632 ,  H04B1/71637 ,  H04L25/4902

Abstract: A method is for decoding a pulse signal modulated through a transmitted reference modulation scheme. The modulated pulse signal may include, repetitively, a reference pulse followed by an information pulse delayed with a delay. The method may include subtracting or adding from the modulated pulse signal, a version of the modulated pulse signal delayed with the delay for obtaining a processed signal, and performing a non-coherent detection on the processed signal.

Abstract translation: 一种用于解码通过发送的参考调制方案调制的脉冲信号的方法。 调制脉冲信号可以重复地包括参考脉冲，随后是延迟延迟的信息脉冲。 该方法可以包括从调制脉冲信号中减去或加上经延迟以获得经处理信号的调制脉冲信号的版本，以及对经处理的信号执行非相干检测。