公开(公告)号：US20140206157A1

公开(公告)日：2014-07-24

申请号：US13747907

申请日：2013-01-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Tim Baldauf ,  Stefan Flachowsky ,  Tom Herrmann ,  Ralf Illgen

IPC: H01L29/66

CPC classification number: H01L29/66666 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/0676 ,  H01L29/66439 ,  H01L29/775

Abstract: A method comprises providing a semiconductor structure comprising a substrate and a nanowire above the substrate. The nanowire comprises a first semiconductor material and extends in a vertical direction of the substrate. A material layer is formed above the substrate. The material layer annularly encloses the nanowire. A first part of the nanowire is selectively removed relative to the material layer. A second part of the nanowire is not removed. A distal end of the second part of the nanowire distal from the substrate is closer to the substrate than a surface of the material layer so that the semiconductor structure has a recess at the location of the nanowire. The distal end of the nanowire is exposed at the bottom of the recess. The recess is filled with a second semiconductor material. The second semiconductor material is differently doped than the first semiconductor material.

Abstract translation: 一种方法包括提供包括衬底和衬底上方的纳米线的半导体结构。 纳米线包括第一半导体材料并沿着衬底的垂直方向延伸。 在衬底上形成材料层。 材料层环绕着纳米线。 相对于材料层选择性地去除纳米线的第一部分。 纳米线的第二部分不会被删除。 远离衬底的纳米线的第二部分的远端比材料层的表面更靠近衬底，使得半导体结构在纳米线的位置具有凹陷。 纳米线的远端暴露在凹槽的底部。 凹部填充有第二半导体材料。 第二半导体材料与第一半导体材料不同地掺杂。

公开(公告)号：US20140131771A1

公开(公告)日：2014-05-15

申请号：US13678054

申请日：2012-11-15

Applicant: GLOBALFOUNDRIES INC.

Inventor： Stefan Flachowsky ,  Matthias Kessler ,  Jan Hoentschel

IPC: H01L27/12 ,  H01L21/02

CPC classification number: H01L21/84 ,  H01L21/02428 ,  H01L21/76283 ,  H01L21/823412 ,  H01L21/823878 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/1207 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/20 ,  H01L29/66181 ,  H01L29/7786 ,  H01L29/78 ,  H01L29/861 ,  H01L29/945

Abstract: A structure comprises a semiconductor substrate, a semiconductor-on-insulator region and a bulk region. The semiconductor-on-insulator region comprises a first semiconductor region, a dielectric layer provided between the semiconductor substrate and the first semiconductor region, and a first transistor comprising an active region provided in the first semiconductor region. The dielectric layer provides electrical isolation between the first semiconductor region and the semiconductor substrate. The bulk region comprises a second semiconductor region provided directly on the semiconductor substrate.

Abstract translation: 一种结构包括半导体衬底，绝缘体上半导体区域和体区域。 绝缘体上半导体区域包括第一半导体区域，设置在半导体衬底和第一半导体区域之间的电介质层，以及包括设置在第一半导体区域中的有源区的第一晶体管。 电介质层在第一半导体区域和半导体衬底之间提供电隔离。 本体区域包括直接设置在半导体衬底上的第二半导体区域。