公开(公告)号：US20070241791A1

公开(公告)日：2007-10-18

申请号：US11608790

申请日：2006-12-08

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： G06F17/5068 ,  H03K19/17748 ,  H03K19/17752 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit.

摘要翻译： 本发明的一些实施例提供了可配置集成电路（IC）。 IC包括布置在具有多个行和多个列的阵列中的至少五十个可配置电路。 每个可配置电路，用于可配置地执行一组操作。 至少第一可配置电路以第一重新配置速率重新配置。 第一可配置电路在每次重新配置第一可配置电路时执行不同的操作。 第一可配置电路的重新配置不遵循通过第一可配置电路的一组操作的任何顺序进行。

公开(公告)号：US20070241776A1

公开(公告)日：2007-10-18

申请号：US11535058

申请日：2006-09-25

申请人： Herman Schmit ,  Steven Teig

发明人： Herman Schmit ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/1737 ,  H03K19/17756

摘要： Some embodiments of the invention provide a configurable logic circuit. The logic circuits has inputs for receiving input data. It also has a first connecting circuit for receiving configuration data and at least a portion of the input data. Based at least partially on the received portion of the input data, the first connecting circuit selects configuration data sub-sets. The logic circuit also includes a second core-logic circuit for receiving configuration data sub-sets from the first connecting circuit and for providing the output data. At least two configuration data sub-sets configure the configurable logic circuit to perform at least two different functions on the input data to produce output data.

摘要翻译： 本发明的一些实施例提供了一种可配置的逻辑电路。 逻辑电路具有用于接收输入数据的输入。 它还具有用于接收配置数据和至少一部分输入数据的第一连接电路。 至少部分地基于输入数据的接收部分，第一连接电路选择配置数据子集。 逻辑电路还包括用于从第一连接电路接收配置数据子集并用于提供输出数据的第二核心逻辑电路。 至少两个配置数据子集配置可配置逻辑电路以在输入数据上执行至少两个不同的功能以产生输出数据。

公开(公告)号：US07126381B1

公开(公告)日：2006-10-24

申请号：US10883213

申请日：2004-06-30

申请人： Herman Schmit ,  Steven Teig

发明人： Herman Schmit ,  Steven Teig

IPC分类号： H03K19/00 ,  H03K19/173 ,  H03K19/177 ,  G06F7/38

CPC分类号： H03K19/17736 ,  H03K19/17744 ,  H03K19/17748 ,  H03K19/17796

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes an interconnect circuit having a first set of input terminals and a set of output terminals. The interconnect circuit has several connection schemes for connecting the first input set to the output set. The IC also has a second set of input terminals for carrying a set of input signals, where at least several of the second set of input terminals overlap at least a plurality of the first set of input terminals. The IC further has a set of vias, where each via connects an input terminal in the first set with an input terminal in the second set. The interconnect circuit receives a control signal and based on this control signal connects the first input terminal set to the output set by using a particular one of the connection schemes.

公开(公告)号：US08638119B2

公开(公告)日：2014-01-28

申请号：US13476203

申请日：2012-05-21

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括用于接收输入数据集和配置数据集并在输入数据集上执行若干功能的逻辑电路。 每个配置数据集指定逻辑电路必须在输入数据集上执行的特定功能。 IC还包括用于在至少特定时间段以特定速率将配置数据提供给逻辑电路的连接电路。 至少两个提供的配置数据集是不同的，并且配置逻辑电路以在输入数据上执行两个不同的功能。

公开(公告)号：US08305110B2

公开(公告)日：2012-11-06

申请号：US13083491

申请日：2011-04-08

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173 ,  H03K19/177 ,  G06F17/50

CPC分类号： G06F17/5068 ,  H03K19/17748 ,  H03K19/17752 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括布置在具有多个行和多个列的阵列中的至少五十个可配置电路。 每个可配置电路，用于可配置地执行一组操作。 至少第一可配置电路以第一重新配置速率重新配置。 第一可配置电路在每次重新配置第一可配置电路时执行不同的操作。 第一可配置电路的重新配置不遵循通过第一可配置电路的一组操作的任何顺序进行。

公开(公告)号：US08193830B2

公开(公告)日：2012-06-05

申请号：US12965812

申请日：2010-12-10

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括用于接收输入数据集和配置数据集并在输入数据集上执行若干功能的逻辑电路。 每个配置数据集指定逻辑电路必须在输入数据集上执行的特定功能。 IC还包括用于在至少特定时间段以特定速率将配置数据提供给逻辑电路的连接电路。 至少两个提供的配置数据集是不同的，并且配置逻辑电路以在输入数据上执行两个不同的功能。

公开(公告)号：US20110133777A1

公开(公告)日：2011-06-09

申请号：US12965812

申请日：2010-12-10

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括用于接收输入数据集和配置数据集并在输入数据集上执行若干功能的逻辑电路。 每个配置数据集指定逻辑电路必须在输入数据集上执行的特定功能。 IC还包括用于在至少特定时间段以特定速率将配置数据提供给逻辑电路的连接电路。 至少两个提供的配置数据集是不同的，并且配置逻辑电路以在输入数据上执行两个不同的功能。

公开(公告)号：US07872496B2

公开(公告)日：2011-01-18

申请号：US12200867

申请日：2008-08-28

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform on the input data set. The IC also includes a connection circuit for supplying sets of the configuration data to the logic circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the logic circuit to perform two different functions on the input data.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括用于接收输入数据集和配置数据集并在输入数据集上执行若干功能的逻辑电路。 每个配置数据集指定逻辑电路必须在输入数据集上执行的特定功能。 IC还包括用于在至少特定时间段以特定速率将配置数据提供给逻辑电路的连接电路。 至少两个提供的配置数据集是不同的，并且配置逻辑电路以在输入数据上执行两个不同的功能。

公开(公告)号：US20100219859A1

公开(公告)日：2010-09-02

申请号：US12685673

申请日：2010-01-11

申请人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad L. Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： G06F17/5068 ,  H03K19/17748 ,  H03K19/17752 ,  H03K19/17776

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures at a first reconfiguration rate. The first configurable circuit performs a different operation each time the first configurable circuit is reconfigured. The reconfiguration of the first configurable circuit does not follow any sequential progression through the set of operations of the first configurable circuit.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括布置在具有多个行和多个列的阵列中的至少五十个可配置电路。 每个可配置电路，用于可配置地执行一组操作。 至少第一可配置电路以第一重新配置速率重新配置。 第一可配置电路在每次重新配置第一可配置电路时执行不同的操作。 第一可配置电路的重新配置不遵循通过第一可配置电路的一组操作的任何顺序进行。

公开(公告)号：US07564260B1

公开(公告)日：2009-07-21

申请号：US11535053

申请日：2006-09-25

申请人： Herman Schmit ,  Steven Teig

发明人： Herman Schmit ,  Steven Teig

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17736 ,  H03K19/17744 ,  H03K19/17748 ,  H03K19/17796

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes an interconnect circuit having a first set of input terminals and a set of output terminals. The interconnect circuit has several connection schemes for connecting the first input set to the output set. The IC also has a second set of input terminals for carrying a set of input signals, where at least several of the second set of input terminals overlap at least a plurality of the first set of input terminals. The IC further has a set of vias, where each via connects an input terminal in the first set with an input terminal in the second set. The interconnect circuit receives a control signal and based on this control signal connects the first input terminal set to the output set by using a particular one of the connection schemes.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 IC包括具有第一组输入端和一组输出端的互连电路。 互连电路具有用于将第一输入组连接到输出组的几种连接方案。 IC还具有用于承载一组输入信号的第二组输入端，其中第二组输入端中的至少几个与至少多个第一组输入端重叠。 IC还具有一组通孔，其中每个通孔将第一组中的输入端与第二组中的输入端连接。 互连电路接收控制信号，并且基于该控制信号，通过使用特定的连接方案将第一输入端子组连接到输出端。