公开(公告)号：US07672326B1

公开(公告)日：2010-03-02

申请号：US11378551

申请日：2006-03-17

Applicant: William Lo ,  Nafea Bishara

Inventor： William Lo ,  Nafea Bishara

IPC: H04L12/28

CPC classification number: G06F13/385 ,  H04J3/0697

Abstract: A double data rate SMII circuit comprises a transmit circuit, responsive to a clock signal, that samples serial transmit data on a clock rising edge to generate a first transmit serial stream. The transmit circuit, responsive to the clock signal, samples the serial transmit data on a clock falling edge to generate a second transmit serial stream. A receive circuit, responsive to the clock signal, generates a receive serial stream from two receive data streams. The receive serial stream having a first operating frequency, each of the two receive data streams having a second operating frequency. The first operating frequency is about twice the second operating frequency. A transmit port, corresponding to the transmit circuit, includes a single terminal to communicate the serial transmit data to the transmit circuit. A receive port, corresponding to the receive circuit, includes a single terminal to communicate the receive serial stream from the receive circuit.

Abstract translation: 双数据速率SMII电路包括响应于时钟信号的发送电路，其在时钟上升沿对采样串行发送数据进行采样以产生第一发送串行流。 响应于时钟信号的发送电路在时钟下降沿对采样串行发送数据进行采样以产生第二发送串行流。 响应于时钟信号的接收电路从两个接收数据流生成接收串行流。 接收串行流具有第一工作频率，两个接收数据流中的每一个具有第二工作频率。 第一个工作频率是第二个工作频率的两倍。 对应于发送电路的发送端口包括将串行发送数据传送到发送电路的单个端子。 对应于接收电路的接收端口包括用于从接收电路传送接收串行流的单个终端。

公开(公告)号：US07660272B1

公开(公告)日：2010-02-09

申请号：US11450693

申请日：2006-06-09

Applicant: William Lo

Inventor： William Lo

IPC: H04B7/00 ,  H04L12/28

CPC classification number: H04L12/40136

Abstract: A physical layer (PHY) module of a network device includes an auto-negotiation module that enables an auto-negotiation mode when the network device one of powers up and loses a link. The PHY includes a control module that communicates with the auto-negotiation module, and that generates a full duplex signal when a PHY of a link partner is in a full duplex mode and does not have the auto-negotiation mode enabled, wherein the PHY sets a duplex mode to the full duplex mode based on the full duplex signal.

Abstract translation: 网络设备的物理层（PHY）模块包括自动协商模块，当网络设备加电并失去链路时，自动协商模式能够启用自动协商模式。 PHY包括与自动协商模块进行通信的控制模块，并且当链路伙伴的PHY处于全双工模式并且没有启用自动协商模式时，该控制模块产生全双工信号，其中PHY集合 基于全双工信号的双工模式到全双工模式。

公开(公告)号：US07616587B1

公开(公告)日：2009-11-10

申请号：US10850239

申请日：2004-05-19

Applicant: William Lo ,  Francis Campana

Inventor： William Lo ,  Francis Campana

IPC: H04L12/28

CPC classification number: H04L41/0806 ,  H04L12/4013

Abstract: The present invention relates to methods and apparatus for performing reverse auto-negotiation, in which one network device establishes a link with another network device at a preferred operating mode (e.g., the lowest speed) common to both devices without linking twice. The physical layer of a local network device (local PHY) may stall the normal auto-negotiation process with the link partner, while receiving the abilities of the link partner. The local PHY may then transmit a signal having only the preferred common operating mode (e.g., the lowest speed) encoded within. The link partner may then conclude that the local PHY is only capable of the preferred common operating mode (e.g., the lowest speed) and a link between the two devices may be established at that common mode.

Abstract translation: 本发明涉及用于执行反向自动协商的方法和装置，其中一个网络设备在两个设备共同的优选操作模式（例如，最低速度）下建立与另一个网络设备的链路，而不链接两次。 本地网络设备（本地PHY）的物理层可以在接收到链路伙伴的能力的同时阻止与链路伙伴的正常自动协商过程。 本地PHY然后可以发送仅具有在其内编码的优选公共操作模式（例如，最低速度）的信号。 然后，链路伙伴可以得出结论，本地PHY仅能够具有优选的公共操作模式（例如，最低速度），并且可以在该共同模式下建立两个设备之间的链路。

公开(公告)号：US07613838B1

公开(公告)日：2009-11-03

申请号：US11888188

申请日：2007-07-31

Applicant: William Lo

Inventor： William Lo

IPC: G06F15/16

CPC classification number: H04L12/40136

Abstract: A physical layer device of a network device comprises a physical coding sublayer (PCS) device encodes data to produce an encoded data block. A scrambler communicates with the PCS device and scrambles the encoded data block to produce a scrambled data block. A sync adder adds a sync header to the scrambled data block. The sync header has a first state when the scrambled data block only includes data portions. The sync header has a second state when the scrambled data block includes at least one control code portion.

Abstract translation: 网络设备的物理层设备包括物理编码子层（PCS）设备对数据进行编码以产生编码数据块。 加扰器与PCS设备进行通信并对编码的数据块进行加扰以产生加扰的数据块。 同步加法器将同步头添加到加扰数据块。 当加扰的数据块仅包括数据部分时，同步报头具有第一状态。 当加密数据块包括至少一个控制代码部分时，同步报头具有第二状态。

公开(公告)号：US07576548B1

公开(公告)日：2009-08-18

申请号：US11831670

申请日：2007-07-31

Applicant: William Lo ,  Yiging Guo ,  Tek Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

Inventor： William Lo ,  Yiging Guo ,  Tek Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

IPC: G01R31/02 ,  G01R31/11

CPC classification number: G01R31/021 ,  G01R31/11

Abstract: A physical layer device includes a cable tester that determines a cable status of a cable and that includes a test module. The test module transmits a test pulse on the cable, measures a reflection amplitude, calculates a cable length, and determines the cable status based on the measured amplitude and the calculated cable length. An insertion loss estimator communicates with the cable tester, and estimates insertion loss of the cable based at least in part on a feedback equalizer gain.

Abstract translation: 物理层设备包括电缆测试器，其确定电缆的电缆状态并且包括测试模块。 测试模块在电缆上发送测试脉冲，测量反射幅度，计算电缆长度，并根据测量的幅度和计算的电缆长度确定电缆状态。 插入损耗估计器与电缆测试器通信，并且至少部分地基于反馈均衡器增益来估计电缆的插入损耗。

公开(公告)号：US07532995B1

公开(公告)日：2009-05-12

申请号：US11800816

申请日：2007-05-08

Applicant: William Lo ,  Francis Campana

Inventor： William Lo ,  Francis Campana

IPC: G01R31/28 ,  G06F11/22

CPC classification number: G01R31/31727 ,  G01R31/31715 ,  G01R31/318552

Abstract: An interpolator testing system comprises an interpolator that generates M clock signals having phase shifts in increments of 360/M degrees relative to a reference clock signal and that outputs one of the M clock signals as a recovered clock signal. A recovered clock counter counts an attribute of the recovered clock signal, wherein the interpolator sequentially selects the M clock signals N times, wherein M and N are integers greater than one.

Abstract translation: 内插器测试系统包括内插器，其生成相对于参考时钟信号以360度/ M度为增量的相移的M个时钟信号，并且将M个时钟信号之一作为恢复的时钟信号输出。 恢复的时钟计数器对恢复的时钟信号的属性进行计数，其中内插器顺序地选择M个时钟信号N次，其中M和N是大于1的整数。

公开(公告)号：US07375532B1

公开(公告)日：2008-05-20

申请号：US11484465

申请日：2006-07-11

Applicant: William Lo ,  Yiqing Guo ,  Tak Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

Inventor： William Lo ,  Yiqing Guo ,  Tak Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

IPC: G01R31/11 ,  G01R31/02

CPC classification number: H04B3/46

Abstract: A physical layer device comprises a first port adapted to communicate with one end of a cable. A second port is adapted to communicate with an opposite end of a cable. A cable tester communicates with the first and second ports and selectively tests the cable to determine a cable status, which includes an open status, a short status, and a normal status. The cable tester includes a test module that transmits a test pulse on the cable, measures a reflection amplitude, calculates a cable length, and determines the cable status based on the measured amplitude and the calculated cable length. A frequency synthesizer selectively outputs a plurality of signals at a plurality of frequencies on the first port. An insertion loss calculator that receives the signals on the second port and that estimates insertion loss.

Abstract translation: 物理层设备包括适于与电缆的一端通信的第一端口。 第二端口适于与电缆的相对端通信。 电缆测试器与第一和第二端口通信，并选择性地测试电缆以确定电缆状态，其包括打开状态，短状态和正常状态。 电缆测试仪包括在电缆上传输测试脉冲的测试模块，测量反射幅度，计算电缆长度，并根据测量的幅度和计算的电缆长度确定电缆状态。 频率合成器以第一端口上的多个频率选择性地输出多个信号。 插入损耗计算器，其接收第二端口上的信号并估计插入损耗。

公开(公告)号：US07362771B1

公开(公告)日：2008-04-22

申请号：US10158337

申请日：2002-05-30

Applicant: William Lo ,  Samuel Er-Shen Tang ,  Sabu Ghazali

Inventor： William Lo ,  Samuel Er-Shen Tang ,  Sabu Ghazali

IPC: H04L12/54

CPC classification number: H04L49/901 ,  H04L49/90 ,  H04L49/9031

Abstract: A First-In-First-Out (FIFO) block to buffer a packet having a size is presented. The FIFO block includes a receiver to receive a data frame including the packet and overhead information, and to extract the packet from the data frame. A buffer has a plurality of memory locations to store the packet in a FIFO configuration. A buffer manager, in response to detecting a buffer low packet condition, stalls reads of the packet from the buffer.

Abstract translation: 呈现先进先出（FIFO）块来缓冲具有大小的数据包。 FIFO块包括接收包括分组和开销信息的数据帧的接收器，并从数据帧中提取分组。 缓冲器具有多个存储器位置以将数据包存储在FIFO配置中。 缓冲器管理器响应于检测到缓冲器低分组条件，停止从缓冲器读取分组。

公开(公告)号：US07358745B1

公开(公告)日：2008-04-15

申请号：US11455467

申请日：2006-06-19

Applicant: William Lo ,  Yiging Guo ,  Tek Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

Inventor： William Lo ,  Yiging Guo ,  Tek Tsui ,  Tsin-Ho Leung ,  Runsheng He ,  Eric Janofsky

IPC: G01R31/11

CPC classification number: H04L43/50 ,  G01R31/11 ,  H04L12/10

Abstract: A physical layer device comprises a first transceiver that selectively communicates with a cable medium. A detector detects a power over Ethernet (POE) device. A switching device selectively provides power from a power supply over the cable medium when the detector detects the POE device. A cable tester communicates with the first transceiver, tests the cable medium and determines a cable status, and delays testing of the cable medium when the detector detects the POE device until the switching device provides the power.

Abstract translation: 物理层设备包括选择性地与电缆介质通信的第一收发器。 检测器检测以太网供电（POE）设备。 当检测器检测到POE设备时，开关设备选择性地通过电缆介质从电源提供电力。 电缆测试器与第一收发器通信，测试电缆介质并确定电缆状态，并且当检测器检测到POE设备直到交换设备提供电源时，延迟对电缆介质的测试。

公开(公告)号：US07278039B1

公开(公告)日：2007-10-02

申请号：US11254986

申请日：2005-10-20

Applicant: William Lo

Inventor： William Lo

IPC: G06F1/32

CPC classification number: H04L12/12 ,  Y02D50/20 ,  Y02D50/40 ,  Y02D50/42

Abstract: A first physical layer device of a first network device includes a sense circuit that senses activity on a medium and with the first physical layer device. An autonegotiation circuit attempts to establish a connection with a second physical layer device of a second network device within a first period after the sense circuit senses activity. An energy saving circuit selectively provides power to the first physical layer device based on the sensed activity and connection with the second physical layer device, and that while attempting to establish the connection resets a timer associated with the first period when the sense circuit senses activity.

Abstract translation: 第一网络设备的第一物理层设备包括感测介质和第一物理层设备上的活动的感测电路。 自动协商电路尝试在感测电路感测活动之后的第一周期内与第二网络设备的第二物理层设备建立连接。 节能电路基于感测的活动和与第二物理层设备的连接来选择性地向第一物理层设备提供电力，并且当感测电路感测到活动时，尝试建立连接时重置与第一周期相关联的定时器。