Method and device for testing a computer core in a processor having at least two computer cores

    公开(公告)号:US09740584B2

    公开(公告)日:2017-08-22

    申请号:US13124445

    申请日:2009-09-03

    IPC分类号: G06F11/22

    CPC分类号: G06F11/2236

    摘要: A method and a device for testing a computer core in a processor having at least two computer cores is described. The computer cores are connected to each other via an internal connecting system, both computer cores contributing toward the operating sequence of a machine. In the method for testing a computer core, with which a high error detection rate may be achieved in a minimum outlay of time, a test is run in one computer core, while a program for executing the driving operation of the motor vehicle is being processed in the other computer core at the same time.

    Method and system for calibrating a shunt resistor

    公开(公告)号:US09632163B2

    公开(公告)日:2017-04-25

    申请号:US14125404

    申请日:2012-05-16

    IPC分类号: G01R35/00 G01R1/20

    CPC分类号: G01R35/005 G01R1/203

    摘要: A shunt resistor includes: two measuring terminals for applying a measuring current flowing through the shunt resistor along a main flow direction; slot structures dividing the shunt resistor along the main flow direction to include two side flow areas of respective first widths and a main flow area of a second width; and two calibration terminals connected to the side flow areas. A circuit connected to the measuring terminals is designed to detect, and generate a signal based on, a measuring current flowing through the shunt resistor. A calibration device connected to the calibration terminals is designed to apply a reference voltage or current to the calibration terminals, and ascertain a calibration voltage based on a falling voltage across those terminals. A correction circuit connected to the calibration device and the detection circuit is designed to correct the signal generated by the detection circuit based on the detected calibration voltage.

    Output stage having zener voltage balancing
    149.
    发明授权
    Output stage having zener voltage balancing 有权
    输出级具有齐纳电压平衡

    公开(公告)号:US08283963B2

    公开(公告)日:2012-10-09

    申请号:US11919623

    申请日:2006-03-31

    IPC分类号: H03K5/08

    CPC分类号: H03K17/122 H03K17/0822

    摘要: An output stage, especially a switching output stage for switching inductive loads, having a plurality of individual output stages that are connected in parallel, which include degenerative transistors, in the degenerative path of which one respective Zener diode is present. The electric power during a switching-off process can be distributed in a particularly uniform manner to the individual output stages or transistors by disposing the Zener diodes near the associated transistors so that they are thermally coupled to the respectively associated transistor and their Zener voltage increases with increasing temperature.

    摘要翻译: 输出级,特别是用于切换感性负载的开关输出级,具有并联连接的多个单独输出级,其包括退化路径,其中存在一个相应的齐纳二极管。 关闭过程期间的电力可以以特别均匀的方式分布到各个输出级或晶体管,通过将齐纳二极管设置在相关联的晶体管附近,使得它们被热耦合到相应的晶体管,并且它们的齐纳电压随着 温度升高。

    METHOD FOR PROCESSING INFORMATION AND ACTIVITIES IN A CONTROL AND/OR REGULATING SYSTEM WITH THE AID OF A MULTI-CORE PROCESSOR
    150.
    发明申请
    METHOD FOR PROCESSING INFORMATION AND ACTIVITIES IN A CONTROL AND/OR REGULATING SYSTEM WITH THE AID OF A MULTI-CORE PROCESSOR 审中-公开
    在多核处理器的帮助下处理控制和/或调节系统中的信息和活动的方法

    公开(公告)号:US20120246650A1

    公开(公告)日:2012-09-27

    申请号:US13497021

    申请日:2010-09-16

    IPC分类号: G06F9/46

    CPC分类号: G06F9/5066

    摘要: A method for processing information and activities in a control and/or regulating system in which the control and/or regulating tasks are performed by a microcontroller, the control/regulating system including different components and the microcontroller receiving information which is evaluated and processed thereby, and at least one output signal being output as the result of control/regulating calculations. In a method for processing information and activities in a control and/or regulating system which may be implemented cost-effectively and nevertheless permits high computing power, the control and regulating tasks of the system are divided into component-specific task complexes, a first component-specific task complex being processed by a first processor core of the microcontroller and a second component-specific task complex being processed by a second processor core of the microcontroller.

    摘要翻译: 一种用于在控制和/或调节系统中处理控制和/或调节任务的方法,其中微控制器执行控制和/或调节任务,所述控制/调节系统包括不同的部件,并且微控制器接收由此评估和处理的信息, 并且作为控制/调节计算的结果输出至少一个输出信号。 在用于处理控制和/或调节系统中的信息和活动的方法中,可以以成本有效的方式实现并且允许高计算能力,系统的控制和调节任务被划分成特定于组件的任务复合体,第一组件 特定任务复合体由微控制器的第一处理器核处理,以及由微控制器的第二处理器核处理的第二组件特定任务复合体。