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公开(公告)号:US20220360815A1
公开(公告)日:2022-11-10
申请号:US17867926
申请日:2022-07-19
Inventor: Chong Soon LIM , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Ru Ling LIAO , Jing Ya LI , Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH
IPC: H04N19/52
Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
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142.
公开(公告)号:US20220329793A1
公开(公告)日:2022-10-13
申请号:US17837171
申请日:2022-06-10
Inventor: Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Che-Wei KUO , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI , Yusuke KATO
IPC: H04N19/117 , H04N19/176 , H04N19/51 , H04N19/80
Abstract: An encoder that encodes a current block to be encoded in an image is provided. The encoder includes: processor; and memory coupled to the processor, in which, in operation, the processor: generates a first prediction image based on a motion vector, the first prediction image being an image with full-pel precision; generates a second prediction image using an interpolation filter by interpolating a value at a fractional-pel position between full-pel positions included in the first prediction image; and encodes the current block based on the second prediction image, and in the using of the interpolation filter, the interpolation filter is switched between a first interpolation filter and a second interpolation filter differing in a total number of taps from the first interpolation filter.
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公开(公告)号:US20220272334A1
公开(公告)日:2022-08-25
申请号:US17667871
申请日:2022-02-09
Inventor: Jing Ya LI , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Che Wei KUO , Chu Tong WANG , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Yusuke KATO
IPC: H04N19/117 , H04N19/186 , H04N19/82 , H04N19/119 , H04N19/105 , H04N19/18 , H04N19/124 , H04N19/13
Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y−1), (2x−1, 2y), (2x, 2y), (2x+1, 2y), (2x−1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).
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公开(公告)号:US20220264155A1
公开(公告)日:2022-08-18
申请号:US17683790
申请日:2022-03-01
Inventor: Jing Ya LI , Chong Soon LIM , Han Boon TEO , Che Wei KUO , Hai Wei SUN , Chu Tong WANG , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Yusuke KATO
IPC: H04N19/96 , H04N19/172
Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes subpicture information in which a width and a height of a subpicture which is a rectangular region in a picture are represented in a unit of a coding tree unit (CTU).
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公开(公告)号:US20220264092A1
公开(公告)日:2022-08-18
申请号:US17728286
申请日:2022-04-25
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/176
Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.
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公开(公告)号:US20220248059A1
公开(公告)日:2022-08-04
申请号:US17725084
申请日:2022-04-20
Inventor: Jing Ya LI , Che Wei KUO , Chong Soon LIM , Chu Tong WANG , Han Boon TEO , Hai Wei SUN , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Yusuke KATO
IPC: H04N19/66 , H04N19/122 , H04N19/176
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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公开(公告)号:US20220248016A1
公开(公告)日:2022-08-04
申请号:US17728284
申请日:2022-04-25
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/52 , H04N19/176 , H04N19/137
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号:US20220248014A1
公开(公告)日:2022-08-04
申请号:US17727194
申请日:2022-04-22
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/52 , H04N19/176 , H04N19/137
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号:US20220201297A1
公开(公告)日:2022-06-23
申请号:US17689421
申请日:2022-03-08
Inventor: Sughosh Pavan SHASHIDHAR , Hai Wei SUN , Chong Soon LIM , Ru Ling LIAO , Han Boon TEO , Jing Ya LI , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Tadamasa TOMA
IPC: H04N19/119 , H04N19/176 , H04N19/423 , H04N19/63
Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
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公开(公告)号:US20220159273A1
公开(公告)日:2022-05-19
申请号:US17592099
申请日:2022-02-03
Inventor: Jing Ya LI , Chong Soon LIM , Han Boon TEO , Che Wei KUO , Hai Wei SUN , Chu Tong WANG , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Yusuke KATO
IPC: H04N19/167 , H04N19/172 , H04N19/96 , H04N19/70
Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes subpicture information in which a horizontal position and a vertical position of a region of a subpicture are represented in a unit of a coding tree unit (CTU). The subpicture is a rectangular region in a picture. The horizontal position is represented by a first position of a first CTU in the subpicture, the first position being relative to a left end of the picture. The vertical position is represented by a second position of a second CTU in the subpicture, the second position being relative to a top end of the picture.
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