Abstract:
The present disclosure provides an addressable light emitting diodes (LED) architecture that is able to control a plurality of LEDs individually. The present disclosure further provides a method of controlling the operation of at least one chain of serially connected LEDs.
Abstract:
An energy-based pattern recognition algorithm receives the input frames of an audio signal and a test frame sequence and returns a best match in the audio signal to the given test frame sequence. The energy of each input frame is computed and input frames for which the energy is both within a predetermined degree of closeness to the local maximum energy within the test frame sequence and a local maximum within a respective neighborhood of adjacent frames are identified as probable matches. The difference between overall energy for frames neighboring the remaining probable matches and the test frame sequence is computed as a percentage. The best match is selected based on a weighted combination of difference between local maximum energies and minimum percent deviation in overall energy. Local signal characteristic matching may be employed, with weighting, to refine matching.
Abstract:
A multi-tone synchronous collision resolution system permits communication nodes within a MANET to contend simultaneously for a plurality of available channels. The communication nodes contend for access using a synchronous signaling mechanism that utilizes multiple tones in a synchronous manner to resolve contentions. Contentions are arbitrated locally, and a surviving subset of communication nodes is selected. The communication nodes of the surviving subset then transmit data packets simultaneously across the available communication channels.
Abstract:
A method of searching for a best-match decimation vector of decimation factors for non-uniform filter bank, the best match vector allowing perfect or near-perfect reconstruction of an input signal of the non-uniform filter bank, the method including the steps of: a) selecting a partial decimation vector having a number, l, of decimation factors, where l does not exceed a maximum number, K, of decimation factors of said best-match decimation vector; b) testing said l decimation factors to determine whether said partial decimation vector satisfies a feasibility criterion; c) testing a least common multiplier value of said l decimation factors to determine whether said least common multiplier value is greater than a predetermined value; d) testing a maximum decimation value, Dmax, of said partial decimation vector to determine whether Dmax is less than one; e) testing a minimum decimation value, Dmin, of said partial decimation vector to determine whether Dmin is greater than one; and f) if said feasibility criterion is satisfied and Dmax is not less than one and Dmin is not greater than one, then incrementing by one the number l of decimation factors in the partial decimation vector and repeating steps b) to e) for a plurality of times.
Abstract translation:一种搜索用于非均匀滤波器组的抽取因子的最佳匹配抽取向量的方法,所述最佳匹配向量允许非均匀滤波器组的输入信号的完美或接近完美的重建,所述方法包括以下步骤: :a)选择具有数字l抽取因子的部分抽取向量,其中l不超过所述最佳匹配抽取向量的抽取因子的最大数目K; b)测试所述l个抽取因子以确定所述部分抽取向量是否满足可行性标准; c)测试所述l个抽取因子的最小公式倍数值,以确定所述最小公倍数值是否大于预定值; d)测试所述部分抽取向量的最大抽取值D max max,以确定D MAX max是否小于1; e)测试所述部分抽取向量的最小抽取值D min min以确定D min min是否大于1; 以及f)如果满足所述可行性标准,并且D最大值不小于1,并且D分钟不大于1,则将数字l的抽取因子加1 在部分抽取向量中重复步骤b)至e)多次。
Abstract:
A device processes an initial digital image with at least one contour zone. The device may have a magnifier able to magnify the initial image into a magnified digital image. The magnifier may have a detector able to detect the contour zones of the initial digital image, a determinater able to determine the size, in terms of number of pixels, of each contour zone, and a second magnifier able to magnify each contour zone using of a software tool, chosen as a function of the size of each contour zone, from among a set of magnifying software tools.
Abstract:
A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material.
Abstract:
The present invention discloses a fast switching current mirror circuit and method for generating fast switching current. The circuit and method for fast switching of a current mirror with large MOSFET size will save space and current consumption.
Abstract:
A slew rate control circuit includes a receiver for receiving input signals and an output generator for generating output signals based on the input signals. The slew rate control circuit also includes an electrical interconnection coupling an output of the receiver and an input of the output generator. In addition, the slew rate control circuit includes a voltage clamp for clamping a voltage on the electrical interconnection between two known voltage reference levels. The voltage clamp may include a first current source for providing driving capacity to a driver circuit to prevent the voltage on the electrical interconnection from falling below one known voltage reference level. The voltage clamp may also include a second current source and a third current source for providing sinking capacity to the driver circuit to prevent the voltage on the electrical interconnection from rising above the other known voltage reference level.
Abstract:
A circuit includes an antenna terminal for generating a current through electromagnetic induction. The circuit also includes a rectifier for receiving the current and generating a rectified power supply voltage. In addition, the circuit includes a voltage clamp for sinking at least some of the current from the antenna terminal based on the rectified power supply voltage from the rectifier. The voltage clamp could include a control circuit (such as an N-channel transistor and a resistor) for controlling the sinking of at least some of the current from the antenna terminal. The voltage clamp could also include a sink circuit (such as an N-channel transistor) for sinking at least some of the current from the antenna terminal. The voltage clamp could further include a sink control circuit (such as a P-channel transistor and a resistor) for activating and deactivating the sink circuit based on operation of the control circuit.
Abstract:
A modem architecture and a method of reducing on-chip memory requirements in a downloadable modem architecture are provided. The preferred architecture consists of a Digital Signal Processor (DSP) (6) with on-chip Random Access Memory (RAM) (12). A procedure which exploits inactivity intervals in a modem modulation function is provided. The procedure dynamically downloads the requisite code segments for each phase of the function from a cheaper, slower external memory (14) into the DSP on-chip RAM during inactivity intervals, thereby reducing the DSP on-chip RAM requirements.