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公开(公告)号：US11424763B2
公开(公告)日：2022-08-23
申请号：US17202050
申请日：2021-03-15
Inventor： Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 7/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
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162.发明授权公开(公告)号：US11368955B2
公开(公告)日：2022-06-21
申请号：US16880545
申请日：2020-05-21
Inventor： Jae-Young Lee , Sung-Ik Park , Sun-Hyoung Kwon , Heung-Mook Kim , Nam-Ho Hur
IPC: H04J3/00 , H04W72/04 , H04L27/26 , H04J11/00 , H04L1/00 , H04L27/34 , H04W52/34 , H04L5/22 , H04L65/611 , H04W52/04
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
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公开(公告)号：US11356121B2
公开(公告)日：2022-06-07
申请号：US17025894
申请日：2020-09-18
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
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公开(公告)号：US11342941B2
公开(公告)日：2022-05-24
申请号：US16866163
申请日：2020-05-04
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit-interleaved coded modulation (BICM) reception device and a BICM reception method are disclosed herein. The BICM reception device includes a demodulator, a bit deinterleaver, and a decoder. The demodulator performs demodulation corresponding to 4096-symbol mapping. The bit deinterleaver performs group-unit deinterleaving on interleaved values. The interleaved values are generated after the demodulation. The decoder restores information bits by LDPC-decoding deinterleaved values generated based on the group-unit deinterleaving. The deinterleaved values corresponds to a LDPC codeword having a length of 64800 and a code rate of 3/15.
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公开(公告)号：US11108409B2
公开(公告)日：2021-08-31
申请号：US16559417
申请日：2019-09-03
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.
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Patent Agency Ranking
166.发明授权公开(公告)号：US11102048B2
公开(公告)日：2021-08-24
申请号：US16821639
申请日：2020-03-17
Inventor： Sung-Ik Park , Jae-Young Lee , Sun-Hyoung Kwon , Heung-Mook Kim , Nam-Ho Hur
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
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公开(公告)号：US11050494B2
公开(公告)日：2021-06-29
申请号：US16538457
申请日：2019-08-12
Inventor： Myung-Sun Baek , Joon-Young Jung , Dong-Joon Choi , Heung-Mook Kim
IPC: H04L27/06 , H04B17/14 , H04B7/0417 , H04B7/0456
Abstract: Disclosed herein are a signal-multiplexing apparatus and method based on machine learning. The signal-multiplexing method based on machine learning, performed by a signal-multiplexing apparatus based on machine learning, including training a transmitted signal using a machine-learning technique, performing complex mapping to transmit the transmitted signal as multiple signals, receiving the multiple signals and regularizing the multiple signals based on a preset rule corresponding to the machine-learning technique, outputting an estimated value for the transmitted signal by training regularized multiple signals using the machine-learning technique, calculating a difference between the transmitted signal and the estimated value for the transmitted signal, and detecting the transmitted signal from an output value when the difference is less than or equal to a preset value.
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公开(公告)号：US11032115B2
公开(公告)日：2021-06-08
申请号：US16652428
申请日：2018-05-24
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , KOREA MARITIME UNIVERSITY INDUSTRY—ACADEMIC COOPERATION FOUNDATION
Inventor： Sung-Ik Park , Jeong-Chang Kim , Jae-Young Lee , Sun-Hyoung Kwon , Hyeong-Seok Kim , Heung-Mook Kim , Nam-Ho Hur
Abstract: Disclosed herein are an apparatus and method for decoding a bootstrap signal. The apparatus for decoding a bootstrap signal according to an embodiment of the present invention includes an operation unit for calculating the relative cyclic shift and the channel gain estimate of a received bootstrap signal and correcting the channel gain estimate using the relative cyclic shift, and a decoding unit for decoding the bootstrap signal using the corrected channel gain estimate.
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公开(公告)号：US11018700B2
公开(公告)日：2021-05-25
申请号：US16566573
申请日：2019-09-10
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Bo-Mi Lim , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
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170.发明授权公开(公告)号：US10992316B2
公开(公告)日：2021-04-27
申请号：US16390316
申请日：2019-04-22
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim
IPC: G06F11/00 , H03M13/00 , H03M13/11 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/15 , G06T7/162 , H04W72/04
Abstract: A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.
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