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161.发明申请公开(公告)号：US20180359045A1
公开(公告)日：2018-12-13
申请号：US15780043
申请日：2016-12-30
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04J13/10 , H04L1/00 , H04L27/26 , H04B1/7073
CPC classification number: H04J13/10 , H04B1/7073 , H04L1/0041 , H04L1/0071 , H04L27/2605
Abstract: An apparatus for transmitting broadcasting signal using transmitter identification and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
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162.发明申请公开(公告)号：US20180302258A1
公开(公告)日：2018-10-18
申请号：US15766153
申请日：2016-11-01
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM
CPC classification number: H04L27/2615 , H04J11/00 , H04J2011/0013 , H04L1/007 , H04L27/2601 , H04L27/2613 , H04L27/3488 , H04N19/30 , H04N21/234327 , H04W4/06 , Y02D70/00 , Y02D70/166 , Y02D70/168
Abstract: An apparatus and method for generating a broadcast signal frame including preamble for signaling injection level information. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes an injection level controller configured to generate a power reduced enhanced layer signal by reducing a power of an enhanced layer signal; a combiner configured to generate a multiplexed signal by combining a core layer signal and the power reduced enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling injection level information corresponding to the injection level controller.
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163.发明申请公开(公告)号：US20180302253A1
公开(公告)日：2018-10-18
申请号：US16012977
申请日：2018-06-20
Inventor： Jae-Young LEE , Sung-Ik PARK , Sun-Hyoung KWON , Heung-Mook KIM
CPC classification number: H04L27/2605 , H04L1/0057 , H04L1/007 , H04L1/0071 , H04L5/0053 , H04L27/183 , H04L27/26 , H04L27/2613 , H04L2001/0093 , H04W52/34
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, type information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.
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164.发明申请公开(公告)号：US20180048505A1
公开(公告)日：2018-02-15
申请号：US15554495
申请日：2016-02-11
Inventor： Jae-Young LEE , Sung-Ik PARK , Sun-Hyoung KWON , Heung-Mook KIM
CPC classification number: H04L27/2605 , H04L1/0057 , H04L1/007 , H04L1/0071 , H04L5/0053 , H04L27/183 , H04L27/26 , H04L27/2613 , H04L2001/0093 , H04W52/34
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, type information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.
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165.发明申请公开(公告)号：US20180041228A1
公开(公告)日：2018-02-08
申请号：US15553910
申请日：2016-02-25
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
CPC classification number: H03M13/152 , H03M13/116 , H03M13/1162 , H03M13/1165 , H03M13/253 , H03M13/255 , H03M13/271 , H03M13/2778 , H03M13/2906 , H03M13/618 , H03M13/6362 , H03M13/6393 , H03M13/6552
Abstract: A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.
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Patent Agency Ranking
166.发明申请公开(公告)号：US20180041225A1
公开(公告)日：2018-02-08
申请号：US15553936
申请日：2016-02-25
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
CPC classification number: H03M13/11 , H03M13/116 , H03M13/152 , H03M13/253 , H03M13/255 , H03M13/2778 , H03M13/2792 , H03M13/2906 , H03M13/39 , H03M13/618 , H03M13/6362
Abstract: A parity puncturing apparatus and method for fixed length signaling information are disclosed. A parity puncturing apparatus according to an embodiment of the present invention includes memory configured to provide a parity bit string for parity puncturing for the parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, and a processor configured to puncture a number of bits corresponding to a final puncturing size from the rear side of the parity bit string.
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167.发明申请公开(公告)号：US20170302765A1
公开(公告)日：2017-10-19
申请号：US15483911
申请日：2017-04-10
Inventor： Jae-Young LEE , Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Heung-Mook KIM
CPC classification number: H04L69/324 , H04L1/0041 , H04L1/0045 , H04L1/0071 , H04L1/0075 , H04L5/0026 , H04L27/2608 , H04L27/2613 , H04L27/2626 , H04L27/2628 , H04L27/2647 , H04L27/3488
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing time interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
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168.发明申请公开(公告)号：US20170294987A1
公开(公告)日：2017-10-12
申请号：US15532065
申请日：2016-03-25
Inventor： Sun-Hyoung KWON , Jae-Young LEE , Sung-Ik PARK , Bo-Mi LIM , Heung-Mook KIM , Jin-Hyuk SONG
CPC classification number: H04L1/0071 , H04L1/00 , H04L1/0058 , H04L1/007 , H04L5/0053 , H04L27/26 , H04L27/2602 , H04L27/3488 , H04L2001/0093 , H04W72/005 , Y02D70/00
Abstract: An apparatus and method for broadcast signal frame using a boundary between Physical Layer Pipes (PLPs) of a core layer are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and a boundary between the time interleaver groups is a boundary between Physical Layer Pipes (PLPs) of a core layer corresponding to the core layer signal.
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公开(公告)号：US20170187394A1
公开(公告)日：2017-06-29
申请号：US15423539
申请日：2017-02-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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公开(公告)号：US20170149455A1
公开(公告)日：2017-05-25
申请号：US15425734
申请日：2017-02-06
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , G06F11/1076 , H03M13/1102 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
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