Abstract:
A slicer with large input common mode range is provided. The slicer includes an input stage coupled to receive an input signal, a current source for providing current for the input stage, a self-biased load coupled to the input stage to provide an initial output signal, and an inverter for inverting the initial output signal to provide a final output signal. The input stage includes a first circuit including a plurality of transistors and a complimentary circuit including a plurality of transistors. When a low common mode input voltage causes the transistors of the first circuit to turn off, the transistors of the complimentary circuit will take over to accomplish the same task as the first circuit.
Abstract:
At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and the second capacitor also may be variable. A third capacitor is connected between the first differential node and the second differential node, and is formed at least partially above the first capacitor. In this way, a size of the first capacitor and/or the second capacitor may be reduced on the substrate, and capacitances of the first and/or second capacitor(s) may be adjusted in response to a variable characteristic of one or more circuit components of the differential circuit.
Abstract:
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Abstract:
A transceiver includes a transmitter portion with an analog modulator that modulates data using frequency shift keyed (FSK) modulation techniques to increase efficiency, reduce power consumption, and reduce IC real estate in comparison to current digital FSK modulation circuits. The analog modulator comprises a loop that includes a pair of integrators and a pair of mixers. In at least one embodiment, the pair of mixers comprises switches that control a polarity of a modulated output signal that is produced to an up-conversion module for up-conversion to RF. The up-conversion module, then, when mixing the modulated output signal with a local oscillation signal, produces an output having one of two possible frequencies wherein the frequencies are a function of the polarity of the modulated output signal. In one embodiment of the invention, the analog modulator comprises differential circuitry, including a plurality of differential switches for cross-connecting input signals to one of a pair of inputs of an amplifier within each of a pair of integrators. Thus, the polarity of the modulated output signal is, at least in part, a function of whether a given signal is input to a positive or a negative terminal of the amplifier within the pair of integrators.
Abstract:
In RF transceivers a method and system for process, voltage, and temperature (PVT) measurement and calibration are provided. A nominal DC offset current may be generated at a nominal temperature and may be based on a calibration voltage. A nominal transconductance parameter may be determined based on the nominal DC offset current and the calibration voltage. The nominal transconductance may be stored and may be utilized to determine temperature and process conditions during operation. In another embodiment, a plurality of DC offset currents may be generated at different temperatures and these generated DC offset currents may be based on a calibration voltage. The calibration voltage may be constant over the range of temperatures. Transconductance parameters may be determined based on the DC offset currents and the calibration voltage. The transconductance parameters may be stored and may be utilized to determine temperature and process conditions during operation.
Abstract:
Certain embodiments of the invention provide a method and system for symmetrically loading a divider circuit for multiband receivers. The method may comprise coupling a second divider circuit to an I component output signal of a first divider circuit and coupling a dummy load to a Q component output signal of the first divider circuit. The dummy load may comprise a load that may be equivalent to the second divider circuit. At least an I component output signal may be generated from the second divider circuit. At least a Q component signal may be generated from the second divider circuit. At least an I component signal generated from the first divider circuit may be received by the second divider circuit. At least a Q component signal generated from the first divider circuit may be received by a dummy load.
Abstract:
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Abstract:
The radio receiver includes a low noise amplifier that amplifies a received signal to one of three different gain settings. One gain setting is maximum amplification, a second gain setting is 6 dB below maximum amplification and a third gain setting is 32 dB below maximum amplification. In the case of the third setting, the low noise amplifier actually attenuates the received signal by 6 dB. The radio receiver includes a pair of received signal strength indicators that provide received signal strength indications to logic circuitry. Responsive to the received signal strength indications, the logic circuitry generates control commands to the low noise amplifier to prompt it to amplify at one of the three specified levels. Generally, if the received signal has a gain level that exceeds a specified threshold, the low noise amplifier actually attenuates the received signal; otherwise, the level of amplification that is actually provided is a function of the presence of intermodulation interference.
Abstract:
A receiver and receiver front end having multiple independent differential inputs, multiple independent differential low-noise amplifiers, and two sets of double-balanced IQ mixers. The double-balanced mixers include cross-coupled PMOS devices that dynamically inject current at zero-crossing points to cancel out tail currents in the mixers. Also, methods of operating the above-discussed receiver and receiver front end.
Abstract:
A receiver portion of a radio includes an analog circuit for determining a peak amplitude in a way that eliminates or reduces the effects of frequency errors that are introduced by crystals within filters and other devices. A voltage follower and a current mirror in which a MOSFET coupled to an output node produces a voltage across its gate to source terminals whose value is a function of a sum of the gate to source voltages of two MOSFET devices that receive a logarithm of an I modulated channel and a logarithm of a Q modulated channel, respectively.