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63 条记录 (耗时 0.027 秒)

    Tri-stated driver for bandwidth-limited load
    12.
    发明申请
    Tri-stated driver for bandwidth-limited load 有权
    三态驱动器，用于带宽限制负载

    公开(公告)号：US20080007295A1

    公开(公告)日：2008-01-10

    申请号：US11807150

    申请日：2007-05-25

    申请人： Kalpendu Shastri

    发明人： Kalpendu Shastri

    IPC分类号： H03K19/096

    CPC分类号： H03K19/09429

    摘要： A CMOS driver circuit is configured to provide a tri-state condition after a predetermined number of like-valued data bits have been transmitted, reducing the presence of intersymbol interference (ISI) along a transmission channel. In situations where the transmission channel is bandwidth-limited, the use of the tri-stating technique allows for the complete transition to the supply rails during the given bit period.

    摘要翻译： CMOS驱动器电路被配置为在已经发送了预定数量的类似值的数据位之后提供三态条件，从而减少了沿着传输信道的符号间干扰（ISI）的存在。 在传输信道受带宽限制的情况下，三态技术的使用允许在给定位周期期间完全转换到电源轨。

    SOI-based opto-electronic device including corrugated active region
    13.
    发明申请
    SOI-based opto-electronic device including corrugated active region 有权
    基于SOI的光电器件包括波纹状的有源区

    公开(公告)号：US20070297709A1

    公开(公告)日：2007-12-27

    申请号：US11807959

    申请日：2007-05-31

    申请人： Robert Montgomery ,  Vipulkumar Patel

    发明人： Robert Montgomery ,  Vipulkumar Patel

    IPC分类号： G02F1/035

    CPC分类号： G02F1/025 ,  G02F1/2257

    摘要： The surface silicon layer (SOI layer) of an SOI-based optical modulator is processed to exhibit a corrugated surface along the direction of optical signal propagation. The required dielectric layer (i.e., relatively thin “gate oxide”) is formed over the corrugated structure in a manner that preserves the corrugated topology. A second silicon layer, required to form the modulator structure, is then formed over the gate oxide in a manner that follows the corrugated topology, where the overlapping portion of the corrugated SOI layer, gate oxide and second silicon layer defines the active region of the modulator. The utilization of the corrugated active region increases the area over which optical field intensity will overlap with the free carrier modulation region, improving the modulator's efficiency.

    摘要翻译： 处理基于SOI的光调制器的表面硅层（SOI层）沿着光信号传播的方向呈现波纹状表面。 所需的电介质层（即相对较薄的“栅极氧化物”）以保持波纹拓扑的方式形成在波纹状结构上。 形成调制器结构所需的第二硅层然后以跟随波纹拓扑的方式形成在栅极氧化物上，其中波纹SOI层，栅极氧化物和第二硅层的重叠部分限定了 调制器。 波纹有源区域的利用增加了光场强度将与自由载波调制区域重叠的面积，从而提高了调制器的效率。

    SOI-based photonic bandgap devices
    14.
    发明授权
    SOI-based photonic bandgap devices 有权
    基于SOI的光子带隙器件

    公开(公告)号：US07298949B2

    公开(公告)日：2007-11-20

    申请号：US11042774

    申请日：2005-01-24

    申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

    发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Keith Montgomery ,  Vipulkumar Patel ,  Soham Pathak ,  David Piede ,  Kalpendu Shastri ,  Katherine A. Yanushefski

    IPC分类号： G02B6/10 ,  G02B6/12

    CPC分类号： G02F1/025 ,  G02F2202/32

    摘要： An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.

    摘要翻译： 基于SOI的光子带隙（PBG）电光器件利用图案化的PBG结构来在SOI电光器件的有源波导区域内限定二维波导。 在SOI结构中包含PBG柱状阵列导致在波导结构内提供光学模式的非常紧密的侧向约束，从而显着减少光学损耗。 通过包括PBG结构，相关联的电触点可以放置在更接近有源区域而不影响光学性能，从而增加电光器件的切换速度。 由于使用PBG用于横向模式限制，整个装置尺寸，电容和电阻也减小。

    Integrated approach for design, simulation and verification of monolithic, silicon-based opto-electronic circuits
    15.
    发明授权
    Integrated approach for design, simulation and verification of monolithic, silicon-based opto-electronic circuits 有权
    用于单片硅基光电路的设计，仿真和验证的综合方法

    公开(公告)号：US07269809B2

    公开(公告)日：2007-09-11

    申请号：US11159283

    申请日：2005-06-22

    申请人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

    发明人： Kalpendu Shastri ,  Soham Pathak ,  Prakash Gothoskar ,  Paulius Mosinskis ,  Bipin Dama

    IPC分类号： G06F17/50 ,  G06F17/10

    CPC分类号： G06F17/5036 ,  G06F17/5068

    摘要： Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design. The results of the co-simulation are compared to the results of the co-verification, with alterations made in the logic design and/or the physical layout until the desired operating parameters are obtained. Once the desired results are generated, conventional wafer-level fabrication operations are then considered to provide a final product (“tape out”).

    摘要翻译： 计算机辅助设计（CAD）工具用于在单片硅基电光芯片中执行电气和光学部件的集成设计，验证和布局。 为最终的硅基单片结构中包含的三种不同类型的元件准备了独立的顶级行为逻辑设计：（1）数字电子集成电路元件; （2）模拟/混合信号电子集成电路元件; 和（3）光电元件（包括无源和有源光学元件）。 一旦行为逻辑设计完成，结果将被合并并共同模拟。 为电路中的每种不同类型的元件开发和验证物理布局设计。 然后将单独的物理布局共同验证，以评估整体物理设计的属性。 将共模拟的结果与协同验证的结果进行比较，在逻辑设计和/或物理布局中进行改变，直到获得所需的操作参数。 一旦产生期望的结果，则常规晶圆级制造操作被认为是提供最终产品（“磁带输出”）。

    Optical detector configuration and utilization as feedback control in monolithic integrated optic and electronic arrangements
    18.
    发明申请
    Optical detector configuration and utilization as feedback control in monolithic integrated optic and electronic arrangements 有权
    光学检测器配置和利用作为单片集成光学和电子布置中的反馈控制

    公开(公告)号：US20060083144A1

    公开(公告)日：2006-04-20

    申请号：US11253456

    申请日：2005-10-19

    申请人： David Piede ,  Kalpendu Shastri ,  Robert Montgomery ,  Prakash Gothoskar ,  Vipulkumar Patel ,  Mary Nadeau

    发明人： David Piede ,  Kalpendu Shastri ,  Robert Montgomery ,  Prakash Gothoskar ,  Vipulkumar Patel ,  Mary Nadeau

    IPC分类号： G11B7/00

    CPC分类号： G02F1/025 ,  G02B6/3586 ,  G02B6/3588 ,  G02B6/3594 ,  G02F1/0123 ,  G02F2201/58 ,  G02F2203/21

    摘要： An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.

    摘要翻译： 通过使用单片光电反馈装置来提供基​​于SOI的光电系统的可靠性和寿命的改进，该装置监测光电系统内的一个或多个光信号，并提供电反馈信号以调整 所选光器件的运行参数。 例如，可以控制输入信号耦合取向。 或者，光学调制器，开关，滤波器或衰减器的操作可以通过本发明的单片反馈装置进行闭环反馈控制。 反馈布置还可以包括耦合到控制电子器件的校准/查找表，以提供用于分析系统性能的基线信号。

    Liquid crystal grating coupling
    19.
    发明申请
    Liquid crystal grating coupling 审中-公开
    液晶光栅耦合

    公开(公告)号：US20060018597A1

    公开(公告)日：2006-01-26

    申请号：US11187725

    申请日：2005-07-22

    申请人： David Piede ,  Prakash Gothoskar ,  Harvey Wagner ,  Margaret Ghiron

    发明人： David Piede ,  Prakash Gothoskar ,  Harvey Wagner ,  Margaret Ghiron

    IPC分类号： G02B6/26

    CPC分类号： G02B6/2852 ,  G02F1/2955 ,  G02F2001/0144 ,  G02F2201/302

    摘要： A tunable optical coupling arrangement for use with a relatively thin (generally sub-micron thickness) silicon waveguiding layer of a silicon-on-insulator (SOI) substrate. The arrangement comprises a multi-layer structure including a substrate for supporting one or more diffractive optical elements and a layer of tunable liquid crystal material. The multi-layer structure is disposed over a conventional SOI substrate including the thin silicon waveguiding layer, where the refractive index of the liquid crystal material can be modified to adjust the deflection of an input optical beam through the various diffractive optical elements and present an optimized launch angle into the silicon waveguiding layer, thus reducing insertion loss at the waveguiding layer.

    摘要翻译： 一种可调光耦合装置，用于与绝缘体上硅（SOI）衬底的较薄（通常为亚微米厚度）的硅波导层一起使用。 该装置包括多层结构，其包括用于支撑一个或多个衍射光学元件的基板和可调谐液晶材料层。 多层结构设置在包括薄硅波导层的常规SOI衬底上，其中可以修改液晶材料的折射率以调节通过各种衍射光学元件的输入光束的偏转，并且呈现优化的 发射角进入硅波导层，从而减小波导层的插入损耗。