Wafer-level opto-electronic testing apparatus and method
    2.
    发明申请
    Wafer-level opto-electronic testing apparatus and method 有权
    晶圆级光电测试仪器及方法

    公开(公告)号:US20050194990A1

    公开(公告)日:2005-09-08

    申请号:US11075430

    申请日:2005-03-08

    CPC classification number: G02B6/30 G02B6/34 G02B2006/12107

    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

    Abstract translation: 用于在绝缘体上硅(SOI)晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上,并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件(例如,棱镜耦合器,光栅)之间的耦合。 此后,光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚,其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示,并因此作为电信号返回到测试元件。

    Active manipulation of light in a silicon-on-insulator (SOI) structure
    3.
    发明申请
    Active manipulation of light in a silicon-on-insulator (SOI) structure 有权
    主动操纵绝缘体上硅(SOI)结构中的光

    公开(公告)号:US20050189591A1

    公开(公告)日:2005-09-01

    申请号:US11069852

    申请日:2005-02-28

    CPC classification number: G02B6/12004 G02F1/025 G02F1/292 G02F2001/294

    Abstract: An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.) so as to form an active, tunable element.

    Abstract translation: 用于主动地控制SOI基光学结构内的光的操纵的布置利用形成在SOI层内的掺杂区域和硅绝缘体 - 硅电容(SISCAP)结构的多晶硅层。 这些区域相反地掺杂以形成有源器件,其中在相对掺杂区域之间施加电压电位用于改变受影响区域中的折射率并改变传播通过该区域的光信号的特性。 可以有利地形成掺杂区域以呈现任何期望的“成形”(例如,透镜,棱镜,布拉格光栅等),以便根据这些器件的已知特性来操纵传播光束。 本发明的一个或多个有源器件可以包括在形成SISCAP的SOI基光学元件(例如,诸如Mach-Zehnder干涉仪,环形谐振器,光学开关等)中,以形成活跃的 ,可调元素。

    EMI-EMC shield for silicon-based optical transceiver
    4.
    发明申请
    EMI-EMC shield for silicon-based optical transceiver 审中-公开
    用于硅基光收发器的EMI-EMC屏蔽

    公开(公告)号:US20050135727A1

    公开(公告)日:2005-06-23

    申请号:US11013722

    申请日:2004-12-16

    Abstract: An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.

    Abstract translation: 基于SOI的光电结构包括在单个SOI层内与其相关联的光学部件一起设置的各种电子部件,形成单片布置。 通过在与SOI层相接的外部棱镜耦合器的表面上形成金属化的外层来提供EMI / EMC屏蔽,金属化层包括透明的孔,以允许光信号耦合到SOI层中。 棱镜耦合器的相对表面也可以用金属材料涂覆以提供额外的屏蔽。 此外,金属屏蔽板可以形成在SOI结构本身上,覆盖EMI敏感电子器件的位置。 所有这些金属层最终被耦合到外部接地平面以隔离结构并提供必要的屏蔽。

    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure
    5.
    发明申请
    Planar waveguide optical isolator in thin silicon-on-isolator (SOI) structure 失效
    薄硅隔离器(SOI)结构中的平面波导光隔离器

    公开(公告)号:US20050123232A1

    公开(公告)日:2005-06-09

    申请号:US11005286

    申请日:2004-12-06

    CPC classification number: G02B6/1228 G02B6/125 G02B6/4207

    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N-1 isolating waveguides). In another embodiment, the non-reciprocal structure comprises a waveguide expansion region including a tapered, mode-matching portion coupled to the output waveguide and an enlarged, non-mode matching portion coupled to the input waveguide such that a majority of a reflected signal will be mismatched with respect to the input waveguide section. By cascading a number of such planar SOI-based structures, increased isolation can be achieved—advantageously within a monolithic arrangement.

    Abstract translation: 在SOI结构的硅表面层内形成平面光隔离器。 正向信号被施加到隔离器的输入波导部分,然后通过非互易波导耦合区域传播到输出波导部分中。 后向信号经由输出波导部分进入,然后耦合到不可逆波导结构中,其中结构的几何结构仅将少量的反射信号耦合到输入波导部分中。 在一个实施例中,非互易结构包括N路定向耦合器(具有一个输出波导,一个输入波导和N-1个隔离波导)。 在另一个实施例中,不可逆结构包括波导扩展区域,其包括耦合到输出波导的锥形模式匹配部分和耦合到输入波导的放大的非模式匹配部分,使得反射信号的大部分将 相对于输入波导部分不匹配。 通过级联多个这种平面的基于SOI的结构,可以实现增加的隔离 - 有利地在单片布置中。

    Packaging Platform For Opto-Electronic Assemblies Using Silicon-Based Turning Mirrors
    7.
    发明申请
    Packaging Platform For Opto-Electronic Assemblies Using Silicon-Based Turning Mirrors 审中-公开
    使用硅基车削镜的光电组件包装平台

    公开(公告)号:US20130188970A1

    公开(公告)日:2013-07-25

    申请号:US13745773

    申请日:2013-01-19

    Abstract: An apparatus for transmitting optical signals includes an interposer for supporting opto-electronic components used to create optical output signals. An enclosure is used to encapsulate the populated interposer assembly and includes a silicon sidewall and a transparent lid. The sidewall is etched to include a turning mirror feature with a reflecting surface at a predetermined angle θ, the turning mirror disposed to intercept the optical output signals and re-direct them through the enclosure's transparent lid. A coverplate is disposed over and aligned with the enclosure, where the coverplate includes a silicon sidewall member that is etched to include a turning mirror element with a reflecting surface at the same angle θ as the enclosure's turning mirror element. The optical signals re-directed by the enclosure then pass through the transparent lid of the enclosure, impinge the turning mirror element of the coverplate, and are then re-directed along the longitudinal axis.

    Abstract translation: 用于发送光信号的装置包括用于支持用于产生光输出信号的光电组件的插入器。 外壳用于封装填充的插入器组件,并且包括硅侧壁和透明盖。 侧壁被蚀刻以包括具有预定角度θ的反射表面的转向镜特征,转向镜被设置成拦截光学输出信号并将其重新引导通过外壳的透明盖。 盖板设置在外壳上并与壳体对准,其中盖板包括硅侧壁构件,其被蚀刻以包括具有与外壳的转向镜元件相同角度θ的反射表面的转向镜元件。 由外壳重新引导的光学信号然后穿过外壳的透明盖,撞击盖板的转向镜元件,然后沿着纵向轴线重新定向。

    Active manipulation of light in a silicon-on-insulator (SOI) structure
    8.
    发明授权
    Active manipulation of light in a silicon-on-insulator (SOI) structure 有权
    主动操纵绝缘体上硅(SOI)结构中的光

    公开(公告)号:US07187837B2

    公开(公告)日:2007-03-06

    申请号:US11069852

    申请日:2005-02-28

    CPC classification number: G02B6/12004 G02F1/025 G02F1/292 G02F2001/294

    Abstract: An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.) so as to form an active, tunable element.

    Abstract translation: 用于主动地控制SOI基光学结构内的光的操纵的布置利用形成在SOI层内的掺杂区域和硅绝缘体 - 硅电容(SISCAP)结构的多晶硅层。 这些区域相反地掺杂以形成有源器件,其中在相对掺杂区域之间施加电压电位用于改变受影响区域中的折射率并改变传播通过该区域的光信号的特性。 可以有利地形成掺杂区域以呈现任何期望的“成形”(例如,透镜,棱镜,布拉格光栅等),以便根据这些器件的已知特性来操纵传播光束。 本发明的一个或多个有源器件可以包括在形成SISCAP的SOI基光学元件(例如,诸如Mach-Zehnder干涉仪,环形谐振器,光学开关等)中,以形成活跃的 ,可调元素。

    Permanent light coupling arrangement and method for use with thin silicon optical waveguides
    9.
    发明授权
    Permanent light coupling arrangement and method for use with thin silicon optical waveguides 有权
    永久光耦合布置及其与薄硅光波导的使用方法

    公开(公告)号:US07020364B2

    公开(公告)日:2006-03-28

    申请号:US10668947

    申请日:2003-09-23

    CPC classification number: G02B6/4206

    Abstract: A trapezoidal shaped single-crystal silicon prism is formed and permanently attached to an SOI wafer, or any structure including a silicon optical waveguide. In order to provide efficient optical coupling, the dopant species and concentration within the silicon waveguide is chosen such that the refractive index of the silicon waveguide is slightly less than that of the prism coupler (refractive index of silicon≈3.5). An intermediate evanescent coupling layer, disposed between the waveguide and the prism coupler, comprises a refractive index less than both the prism and the waveguide. In one embodiment, the evanescent coupling layer comprises a constant thickness. In an alternative embodiment, the evanescent coupling layer may be tapered to improve coupling efficiency between the prism and the waveguide. Methods of making the coupling arrangement are also disclosed.

    Abstract translation: 形成梯形形状的单晶硅棱镜,并且永久地附着到SOI晶片或包括硅光波导的任何结构。 为了提供有效的光耦合,选择硅波导内的掺杂物种类和浓度使得硅波导的折射率略小于棱镜耦合器的折射率(硅折射率为0.35)。 设置在波导和棱镜耦合器之间的中间消逝耦合层包括小于棱镜和波导两者的折射率。 在一个实施例中,ev逝耦合层包括恒定的厚度。 在替代实施例中,渐逝耦合层可以是锥形的,以提高棱镜和波导之间的耦合效率。 还公开了制造耦合装置的方法。

    Silicon nanotaper couplers and mode-matching devices
    10.
    发明授权
    Silicon nanotaper couplers and mode-matching devices 有权
    硅纳米器耦合器和模式匹配器件

    公开(公告)号:US07013067B2

    公开(公告)日:2006-03-14

    申请号:US11054205

    申请日:2005-02-09

    CPC classification number: G02B6/1228 G02B6/4204

    Abstract: An arrangement for coupling between a free-space propagating optical signal and an ultrathin silicon waveguide formed in an upper silicon layer (SOI layer) of a silicon-an-insulator (SOI) structure includes a silicon nanotaper structure formed in the (SOI layer) and coupled to the ultrathin silicon waveguide. A dielectric waveguide coupling layer is disposed so as to overly a portion of a dielectric insulating layer in a region where an associated portion of the SOI layer has been removed. An end portion of the dielectric waveguide coupling layer is disposed to overlap an end section of the silicon nanotaper to form a mode conversion region between the free-space signal and the ultrathin silicon waveguide. A free-space optical coupling arrangement is disposed over the dielectric waveguide coupling layer and used to couple between free space and the dielectric waveguide coupling layer and thereafter into the ultrathin silicon waveguide.

    Abstract translation: 在自由空间传播的光信号和形成于硅 - 绝缘体(SOI))结构的上硅层(SOI层)中的超薄硅波导之间的耦合的布置包括在(SOI层)中形成的硅纳米锥结构, 并耦合到超薄硅波导。 电介质波导耦合层设置成在去除了SOI层的相关部分的区域中的绝缘层的一部分上。 电介质波导耦合层的端部设置成与硅纳米锥的端部部分重叠以在自由空间信号和超薄硅波导之间形成模式转换区域。 自由空间光耦合装置设置在电介质波导耦合层上,用于将自由空间与电介质波导耦合层之间耦合,此后进入超薄硅波导。

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