公开(公告)号：US20080074417A1

公开(公告)日：2008-03-27

申请号：US11535573

申请日：2006-09-27

Applicant: Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer

Inventor： Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer

IPC: G06T15/40

CPC classification number: G06T15/06 ,  G06T17/005

Abstract: Embodiments of the invention provide methods and apparatus for reallocating workload related to traversal of a ray through a spatial index. In a first operating state a workload manager may be experiencing a first or a normal workload. In the first operating state the workload manager may be responsible for traversing the entire spatial index and a vector throughput engine may be responsible for performing ray-primitive intersection tests. In an increased workload state the workload manager may experience an increased workload. In response to the increased workload the image processing system may partition the spatial index such that the workload manager may be responsible for traversing a first portion of the spatial index and the vector throughput engine may be responsible for traversing a second portion of the spatial index and for performing ray-primitive intersection tests.

Abstract translation: 本发明的实施例提供了用于重新分配通过空间索引穿过射线的工作量的方法和装置。 在第一个操作状态下，工作负载管理器可能正在经历第一个或正常工作负载。 在第一个操作状态下，工作负载管理器可能负责遍历整个空间索引，而矢量吞吐量引擎可能负责执行光线原始相交测试。 在增加的工作负载状态下，工作负载管理器可能会遇到增加的工作负载。 响应于增加的工作负载，图像处理系统可以分割空间索引，使得工作负载管理器可能负责遍历空间索引的第一部分，并且向量吞吐量引擎可以负责遍历空间索引的第二部分， 用于执行光线原始相交测试。

公开(公告)号：US08239438B2

公开(公告)日：2012-08-07

申请号：US11840277

申请日：2007-08-17

Applicant: Adam James Muff ,  Matthew Ray Tubbs

Inventor： Adam James Muff ,  Matthew Ray Tubbs

IPC: G06F7/38

CPC classification number: G06F7/5443 ,  G06F7/483 ,  G06F9/30014 ,  G06F9/30036 ,  G06F9/3893

Abstract: Embodiments of the invention provide methods and apparatus for executing a multiple operand instruction. Executing the multiple operand instruction comprises computing an arithmetic result of a pair of operands in each processing lane of a vector unit. The arithmetic results generated in each processing lane of the vector unit may be transferred to a dot product unit. The dot product unit may compute an arithmetic result using the arithmetic result computed by each processing lane of the vector unit to generate an arithmetic result of more than two operands.

Abstract translation: 本发明的实施例提供了用于执行多操作数指令的方法和装置。 执行多操作数指令包括​​计算向量单元的每个处理通道中的一对操作数的算术结果。 在矢量单元的每个处理车道中产生的算术结果可以被转移到点积单位。 点积单位可以使用由向量单位的每个处理车道计算的算术结果来计算算术结果，以生成超过两个操作数的算术结果。

公开(公告)号：US08139061B2

公开(公告)日：2012-03-20

申请号：US12184324

申请日：2008-08-01

Applicant: Adam James Muff ,  Matthew Ray Tubbs

Inventor： Adam James Muff ,  Matthew Ray Tubbs

IPC: G06T15/00

CPC classification number: G06F9/30014 ,  G06F9/3802 ,  G06F9/3851 ,  G06F9/3877 ,  G06F9/3885 ,  G06T15/50 ,  G06T2200/28

Abstract: A floating point execution unit calculates a one minus dot product value in a single pass. As such, the dependency that otherwise would be required to perform the calculations is eliminated, resulting in a substantially faster performance of such calculations. The floating point execution unit may be used, for example, to accelerate pixel shading algorithms such as Fresnel and electron microscope effects.

Abstract translation: 浮点执行单元在单程中计算一个减去点积积值。 因此，消除了否则将执行计算所需的相关性，导致这种计算的性能显着更快。 例如，浮点执行单元可以用于加速诸如菲涅耳和电子显微镜效应的像素着色算法。

公开(公告)号：US07921278B2

公开(公告)日：2011-04-05

申请号：US12045313

申请日：2008-03-10

Applicant: Adam James Muff ,  Matthew Ray Tubbs

Inventor： Adam James Muff ,  Matthew Ray Tubbs

IPC: G06F9/30 ,  G06F9/40 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44

CPC classification number: G06F9/30014 ,  G06F7/4873 ,  G06F7/535 ,  G06F9/30065 ,  G06F9/3838 ,  G06F9/3851 ,  G06F9/3857 ,  G06F9/3859 ,  G06F2207/5355 ,  G06F2207/5356

Abstract: An “early exit” of an iterative refinement algorithm is implemented by effectively disabling read after write dependency stalls of newer instructions, as well as disabling the register write enable of these instructions, for the remainder of the algorithm, in addition to disabling the register write enable of these instructions. By doing so, the latency of the algorithm is reduced and the performance is increased without the complexity and potential poor performance of compare and branch instructions that might otherwise be required.

Abstract translation: 迭代细化算法的“提前退出”除了禁用寄存器写入之外，还通过有效禁用更新指令的写依赖性停止之后的读取以及禁止这些指令的寄存器写使能，对于算法的其余部分 启用这些指令。 通过这样做，降低了算法的等待时间，并且性能得到提高，而没有另外需要的比较和分支指令的复杂性和潜在的差的性能。

公开(公告)号：US07904699B2

公开(公告)日：2011-03-08

申请号：US12045221

申请日：2008-03-10

Applicant: Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer ,  Matthew Ray Tubbs

Inventor： Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer ,  Matthew Ray Tubbs

IPC: G06F9/00

CPC classification number: G06F9/30032 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/30123

Abstract: Persistent vector multiplexer control is used in a vector-based execution unit to control the shuffling of words in operand vectors processed by the execution unit. In addition, a persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be persisted such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.

Abstract translation: 持续矢量复用器控制在基于矢量的执行单元中用于控制由执行单元处理的操作数向量中的字的混洗。 此外，在用于基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息被持久化，使得由基于向​​量的执行单元执行的后续向量指令处理的操作数向量将被 使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。

公开(公告)号：US07890699B2

公开(公告)日：2011-02-15

申请号：US11972221

申请日：2008-01-10

Applicant: Miguel Comparan ,  Eric Oliver Mejdrich ,  Adam James Muff

Inventor： Miguel Comparan ,  Eric Oliver Mejdrich ,  Adam James Muff

IPC: G06F12/00

CPC classification number: G06F12/0888 ,  G06F12/0811

Abstract: A circuit arrangement and method bypass the storage of requested data in a higher level cache of a multi-level memory architecture during the return of the requested data to a requester, while caching the requested data in a lower level cache. For certain types of data, e.g., data that is only used once and/or that is rarely modified or written back to memory, bypassing storage in a higher level cache reduces the likelihood of the requested data casting out frequently used data from the higher level cache. By caching the data in a lower level cache, however, the lower level cache can still snoop data requests and return requested data in the event the data is already cached in the lower level cache.

Abstract translation: 在将所请求的数据返回到请求者的同时，在将所请求的数据缓存在较低级别的高速缓存中的同时，电路装置和方法将所请求的数据的存储绕过多层存储器体系结构的更高级缓存。 对于某些类型的数据，例如仅使用一次和/或很少被修改或写回存储器的数据，绕过较高级别高速缓存中的存储降低了请求的数据从较高级别投出常用数据的可能性 缓存。 然而，通过将数据缓存在较低级别的缓存中，低级缓存仍然可以窥探数据请求，并在数据已经缓存在较低级别缓存中的情况下返回请求的数据。

公开(公告)号：US07868894B2

公开(公告)日：2011-01-11

申请号：US11564072

申请日：2006-11-28

Applicant: Eric Oliver Mejdrich ,  Adam James Muff ,  Matthew Ray Tubbs

Inventor： Eric Oliver Mejdrich ,  Adam James Muff ,  Matthew Ray Tubbs

IPC: G06T1/00

CPC classification number: G06T1/20

Abstract: The present invention is generally related to the field of image processing, and more specifically to an instruction set for processing images. Vector processing may involve rearranging vector operands in one or more source registers prior to performing vector operations. Typically, rearranging of operands in source registers is done by issuing a plurality of permute instructions that require excessive usage of temporary registers. Furthermore, the permute instructions may cause dependencies between instructions executing in a pipeline, thereby adversely affecting performance. Embodiments of the invention provide a level of muxing between a register file and a vector unit that allow for rearrangement of vector operands in source registers prior to providing the operands to the vector unit, thereby obviating the need for permute instructions.

Abstract translation: 本发明通常涉及图像处理领域，更具体地涉及用于处理图像的指令集。 矢量处理可以包括在执行向量操作之前在一个或多个源寄存器中重新排列向量操作数。 通常，通过发出需要临时寄存器过度使用的多个置换指令来完成源寄存器中操作数的重新排列。 此外，置换指令可能导致在流水线中执行的指令之间的相关性，从而不利地影响性能。 本发明的实施例提供了一种在寄存器文件和向量单元之间的复用水平，其允许在将操作数提供给向量单元之前重新排列源寄存器中的向量操作数，从而避免了对置换指令的需要。

公开(公告)号：US07809925B2

公开(公告)日：2010-10-05

申请号：US11952193

申请日：2007-12-07

Applicant: Eric Oliver Mejdrich ,  Adam James Muff ,  Matthew Ray Tubbs

Inventor： Eric Oliver Mejdrich ,  Adam James Muff ,  Matthew Ray Tubbs

IPC: G06F15/80

CPC classification number: G06F15/8015 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/3012 ,  G06F9/30189 ,  G06F9/3802 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/3891 ,  G06F15/8061

Abstract: A vectorizable execution unit is capable of being operated in a plurality of modes, with the processing lanes in the vectorizable execution unit grouped into different combinations of logical execution units in different modes. By doing so, processing lanes can be selectively grouped together to operate as different types of vector execution units and/or scalar execution units, and if desired, dynamically switched during runtime to process various types of instruction streams in a manner that is best suited for each type of instruction stream. As a consequence, a single vectorizable execution unit may be configurable, e.g., via software control, to operate either as a vector execution or a plurality of scalar execution units.

Abstract translation: 可矢量化执行单元能够以多种模式操作，可矢量化执行单元中的处理通道被分组成不同模式的逻辑执行单元的不同组合。 通过这样做，处理通道可以选择性地组合在一起以作为不同类型的向量执行单元和/或标量执行单元来操作，并且如果需要，在运行时期间以最适合于以下方式处理各种类型的指令流的方式进行动态切换 每种类型的指令流。 因此，单个可矢量化执行单元可以例如通过软件控制来配置，以作为向量执行或多个标量执行单元来操作。

公开(公告)号：US20100191937A1

公开(公告)日：2010-07-29

申请号：US12360975

申请日：2009-01-28

Applicant: Mark Joseph Hickey ,  Adam James Muff ,  Matthew Ray Tubbs ,  Charles David Wait

Inventor： Mark Joseph Hickey ,  Adam James Muff ,  Matthew Ray Tubbs ,  Charles David Wait

IPC: G06F9/312 ,  G06F9/30

CPC classification number: G06F9/30145 ,  G06F9/30123 ,  G06F9/30181 ,  G06F9/3824 ,  G06F9/3838 ,  G06F9/3851

Abstract: A logic arrangement and method to support implied storage operation decode uses redundant target address detection, whereby target addresses of previous instructions are compared with the target address of the current instruction, and if equal, and the target addresses of previous instructions are not used as sources, the current instruction is decoded as a store instruction. This allows a redundant operation in an instruction set architecture to be redefined as a store instruction, freeing up opcodes normally used for store instructions to be used for other instructions.

Abstract translation: 支持隐含存储操作解码的逻辑布置和方法使用冗余目标地址检测，由此将先前指令的目标地址与当前指令的目标地址进行比较，如果相等，并且先前指令的目标地址不被用作源 ，当前指令被解码为存储指令。 这允许将指令集架构中的冗余操作重新定义为存储指令，释放通常用于存储指令的操作码以用于其他指令。

公开(公告)号：US20090228682A1

公开(公告)日：2009-09-10

申请号：US12045222

申请日：2008-03-10

Applicant: Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer ,  Matthew Ray Tubbs

Inventor： Eric Oliver Mejdrich ,  Adam James Muff ,  Robert Allen Shearer ,  Matthew Ray Tubbs

IPC: G06F9/30 ,  G06F15/76

CPC classification number: G06F9/30032 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/30123

Abstract: A software-accessible special purpose register is architected into a processing unit in order to implement persistent vector multiplexer control of a vector-based execution unit. A persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be stored in the special purpose register such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.

Abstract translation: 软件可访问专用寄存器被设计成处理单元，以便实现基于向量的执行单元的持久矢量多路复用器控制。 在基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息存储在专用寄存器中，使得由基于向​​量的执行单元执行的后续向量指令处理的操作数向量 将使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。